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LMH6555 Datasheet, PDF (19/37 Pages) Intersil Corporation – Low Distortion 1.2 GHz Differential Driver
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VCC
LMH6555
SNOSAJ1D – NOVEMBER 2006 – REVISED MARCH 2013
RL2
U1
RL1
RF1
RS1
RG1
+
-
RS2
RG2
RF2
LMH6555
RT2
50:
RT1
50:
VOUT-
ADC081000/
ADC081500
VOUT+
VCMO
VCM_REF
VCM_REF buffer not shown
Figure 34. Differential Amplification and ADC Drive
For applications similar to the one shown in Figure 34, the following conditions should be maintained:
1. The LMH6555 differential output voltage has to comply with the ADC full scale voltage (800 mVPP in this
case).
2. The LMH6555 input Common Mode Voltage Range is observed. “CMVR”, as specified in Electrical
Characteristics, is to be between −0.3V and 2.0V for the specified CMRR.
3. U1 collector voltage swing must to be observed so that the U1 output transistors do not saturate. The
expected operating range of these output transistors is defined by the specifications and operating conditions
of U1.
Consider a numerical example (RL refers to RL1 & RL2, RS refers to RS1 & RS2).
Assume:
VCC = 10V, U1 peak-to-peak collector current (IPP) = 15 mAPP with 10 mA quiescent (IcQ), and minimum
operational U1 collector voltage = 6V.
Here are the series of steps to take in order to carry out this design:
a. Select the RL value which allows compliance with the U1 collector voltage (6V in this case) with 1V extra as
margin because of LMH6555 loading.
RL = [10 - (6+1)] V / (10+ 7.5) mA = 171Ω
Choose 169Ω, 1% resistors for RL
b. Find the value of RS to get the proper swing at the output (800 mVPP). To do so, convert the input stage into
its Norton equivalent as shown in Figure 35
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