LMH6555 Datasheet, PDF (16/37 Pages) Intersil Corporation – Low Distortion 1.2 GHz Differential Driver

LMH6555
SNOSAJ1D – NOVEMBER 2006 – REVISED MARCH 2013
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SOURCE IMPEDANCE(S) AND THEIR EFFECT ON GAIN AND OFFSET
The source impedances R_S1 and R_S2, as shown in Figure 25 or Figure 27, affect gain and output offset. The
Electrical Characteristics and TYPICAL PERFORMANCE CHARACTERISTICS are generated with equal valued
source impedances R_S1 and R_S2, unless otherwise specified. Any mismatch between the values of these two
impedances would alter the gain and offset voltage.
OUTPUT OFFSET CONTROL AND ADJUSTMENT
There are applications which require that the LMH6555 differential output voltage be set by the user. An example
of such an application is a unipolar signal which is converted to a differential output by the LMH6555. In order to
utilize the full scale range of the ADC input, it is beneficial to shift the LMH6555 outputs to the limits of the ADC
analog input range under minimal signal condition. That is, one LMH6555 output is shifted close to the negative
limit of the ADC analog input and the other close to the positive limit of the ADC analog input. Then, under
maximum signal condition, with proper gain, the full scale range of the ADC input can be traversed and the ADC
input dynamic range is properly utilized. If this forced offset were not imposed, the ADC output codes would be
reduced to half of what the ADC is capable of producing, resulting in a significant reduction in ENOB. The choice
of the direction of this shift is determined by the polarity of the expected signal.
Another scenario where it may be necessary to shift the LMH6555 output offset voltage is in applications where it
is necessary to improve the specified Output Offset Voltage (differential mode), “V_OOS”. Some ADC’s, including
the ADC081000/ ADC081500 (and their dual counterparts), have internal registers to correct for the driver’s
(LMH6555) V_OOS. If the LMH6555 V_OOS rating exceeds the maximum value allowed into this register, then
shifting the output is required for maximum ADC performance.
It is possible to affect output offset voltage by manipulating the value of one input resistance relative to the other
(e.g. R_S1 relative to R_S2 or vice versa). However, this will also alter the gain. Assuming that the source is applied
to the V_IN+ side through R_S1, Figure 29(A) shows the effect of varying R_S1 on the overall gain and output offset
voltage. Figure 29(B) shows the same effects but this time for when the undriven side impedance, R_S2, is varied.
2.90
(A)
2.80
GAIN
2.70
2.60
100
60
V_OOS
2.90
100
(B)
2.80
V_OOS
2.70
60
2.60
2.50
20
2.50
20
GAIN
2.40
2.40
2.30
-20
2.30
-20
2.20
2.10
2.00
1.90
35
R_S2 = 50:
SINGLE ENDED INPUT
APPLIED THROUGH R_S1
40 45 50 55 60 65
R_S1 (:)
-60
-100
70
2.20
2.10 ^RS1 ^{= 50:}
SINGLE ENDED INPUT
2.00
APPLIED THROUGH R_S1
1.90
35 40 45 50 55 60 65
R_S2 (:)
-60
-100
70
Figure 29. Gain & Output Offset Voltage vs. Source Impedance Shift for Single Ended Input Drive
As can be seen in Figure 29, the source impedance of the input side being driven has a bigger effect on gain
than the undriven source impedance. R_S1 and R_S2 affect the output offset in opposite directions. Manipulating the
value of R_S2 for offset control has another advantage over doing the same to R_S1 and that is the signal input
termination is not affected by it. This is especially important in applications where the signal is applied to the
LMH6555 through a transmission line which needs to be terminated in its characteristic impedance for minimum
reflection.
For reference, Figure 30 shows the effect of source impedance misbalance on overall gain and output offset
voltage with differential input drive.
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