THS4011 Datasheet, PDF (18/36 Pages) Texas Instruments – 290-MHz LOW-DISTORTION HIGH-SPEED AMPLIFIERS

THS4011
THS4012
SLOS216E – JUNE 1999 – REVISED APRIL 2010
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The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat-dissipating device.
The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward mechanical methods of heatsinking.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
NOTE: The thermal pad is electrically isolated from all terminals in the package.
Figure 33. Thermally-Enhanced DGN Package Views
Although there are many ways to properly heatsink this device, the following steps show the recommended
approach:
1. Prepare the PCB with a top-side etch pattern as shown in Figure 34. There should be etch for the leads, as
well as etch for the thermal pad.
2. Place five holes in the area of the thermal pad. These holes should be 13 mils in diameter. Keep them small
so that solder wicking through the holes is not a problem during reflow.
3. Additional vias may be placed anywhere along the thermal plane outside of the thermal-pad area. This helps
dissipate the heat generated by the THS401xDGN IC. These additional vias may be larger than the 13-mils
diameter vias directly under the thermal pad. They can be larger because they are not in the thermal-pad
area to be soldered so that wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology. Web connections have a high thermal-resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In
this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the
holes under the THS401xDGN package should make their connection to the internal ground plane with a
complete connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals of the package and the thermal-pad area with its five
holes exposed. The bottom-side solder mask should cover the five holes of the thermal-pad area. This
prevents solder from pulling away from the thermal-pad area during the reflow process.
7. Apply solder paste to the exposed thermal-pad area and all of the IC terminals.
8. With these preparatory steps in place, the THS401xDGN IC is simply placed in position and run through the
solder reflow operation as any standard surface-mount component. This results in a part that is properly
installed.
Thermal-pad area (68 mils x 70 mils) with 5 vias
(via diameter = 13 mils)
Figure 34. PowerPAD™ PCB Etch and Via Pattern
The actual thermal performance achieved with the THS401xDGN in its PowerPAD package depends on the
application. In the previous example, if the size of the internal ground plane is approximately 3 in × 3 in, the
expected thermal coefficient, q_JA, is approximately 58.4°C/W. For comparison, the non-PowerPAD version of the
THS401x IC (SOIC) is shown. For a given q_JA, the maximum power dissipation is shown in Figure 35 and is
calculated by the following formula:
18
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