THS4011 Datasheet, PDF (16/36 Pages) Texas Instruments – 290-MHz LOW-DISTORTION HIGH-SPEED AMPLIFIERS

THS4011
THS4012
SLOS216E – JUNE 1999 – REVISED APRIL 2010
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OFFSET VOLTAGE
The output offset voltage (V_OO) is the sum of the input offset voltage (V_IO) and both input bias currents (I_IB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
Figure 29. Output Offset Voltage Model
OPTIMIZING UNITY GAIN RESPONSE
Internal frequency compensation of the THS401x was selected to provide very wideband performance, yet
maintain stability when operating in a noninverting unity gain configuration. When amplifiers are compensated in
this manner, there is usually peaking in the closed-loop response and some ringing in the step response for fast
input edges, depending on the application. This is because a minimum phase margin is maintained for the
G = +1 configuration. For optimum settling time and minimum ringing, a feedback resistor of 100 Ω should be
used (see Figure 30). Additional capacitance can also be used in parallel with the feedback resistance if even
finer optimization is required.
Input
+
THS401x
_
Output
100 Ω
Figure 30. Noninverting Unity Gain Schematic
GENERAL CONFIGURATIONS
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see
Figure 31).
Figure 31. Single-Pole Low-Pass Filter
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