LMH6552_14 Datasheet, PDF (16/32 Pages) Texas Instruments – 1.5 GHz Fully Differential Amplifier

LMH6552
SNOSAX9H – APRIL 2007 – REVISED MARCH 2013
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A_V, R_IN
R_S
R_G
a VS
R_T
V_CM
R_F
V⁺
+
LMH6552
R_M
R_G
+-
-
V^-
R_F
R_O
-
V_O
+
R_O
IN-
ADC
IN+
A_V =
¨©§¨
2(1 - E1)
E₁ + E₂
R_IN
=
¨¨©§^2RG
+
1
R_M (1-E₂)
+ E₂
E₁ = _{¨¨©§RG}^R+G_RF
E₂ = _{¨¨©§RG}^R+G_R+F^R+M_RM
R_S = R_T || R_IN
R_M = R_T || R_S
Figure 46. Single Ended Input with Differential Output
When using the LMH6552 in single-to-differential mode, the complimentary output is forced to a phase inverted
replica of the driven output by the common mode feedback circuit as opposed to being driven by its own
complimentary input. Consequently, as the driven input changes, the common mode feedback action results in a
varying common mode voltage at the amplifier's inputs, proportional to the driving signal. Due to the non-ideal
common mode rejection of the amplifier's input stage, a small common mode signal appears at the outputs which
is superimposed on the differential output signal. The ratio of the change in output common mode voltage to
output differential voltage is commonly referred to as output balance error. The output balance error response of
the LMH6552 over frequency is shown in Typical Performance Characteristics.
To match the input impedance of the circuit in Figure 46 to a specified source resistance, R_S, requires that R_T ||
R_IN = R_S. The equations governing R_IN and A_V for single-to-differential operation are also provided in Figure 46.
These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain
with the proper input termination. Component values for several common gain configurations in a 50Ω
environment are given in Table 2. Gain Component Values for 50Ω System WSON Package. Typically R_S=50Ω
while R_M=R_S||R_T.
Table 2. Gain Component Values for 50Ω System WSON Package
Gain
0 dB
6 dB
12 dB
R_F
275Ω
275Ω
275Ω
R_G
255Ω
127Ω
54.9Ω
R_T
59Ω
68.1Ω
107Ω
R_M
26.7Ω
28.7Ω
34Ω
357:
50:
R_S = 50:
348:
a ^VS
56.2:
+
V_CM
R_L
-
348:
26.4:
ENABLE
50:
357:
Figure 47. Single Ended Input S-Parameter Test Circuit (50Ω System)
16
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