CR16HCS5 Datasheet, PDF (150/156 Pages) National Semiconductor (TI) – Family of 16-bit CAN-enabled CompactRISC Microcontrollers

Table 45 Output Signals
Symbol Figure
Description
Reference
Min (ns) Max (ns)
t_SCLro
t_SCLlowo
88 SCL signal Rise time
91 SCL low time
After SCL F.E.
-^d
K*t_CLK -
1^e
t_SCLhigho 91 SCL high time
After SCL R.E.
K*t_CLK -
1^e
t_SDAfo
88 SDA signal Fall time
300
t_SDAro
88 SDA signal Rise time
-
t_SDAho
91 SDA hold time
After SCL F.E.
7*t_CLK -
t_SCLfo
t_SDAvo
91 SDA valid time
After SCL F.E.
7*tCLK+
tRD
a. Tclk is the actual clock period of the CPU clock used in the system.
The value of Tclk is system dependent.
The maximum cycle time of 64000ns is for Power Save mode; in active mode, the maximum cycle time is limited to 250ns by
the high frequency oscillator.
b. Guaranteed by design, but not fully tested.
c. Assuming signal’s capacitance up to 400pF.
d. Depends on the signal’s capacitance and the pull-up value. Must be less than 1ms.
e. K is as defined in ACBCTL2.SCLFRQ.
Table 46 Input Signal Requirements
Symbol Figure
Description
Reference
t_X1p
t_X1h
t_X1l
t_X2p
t_X2h
t_X2l
t_Is
t_{I h}
t_RST
77 X1 period
77 X1 high time, external clock
77 X1 low time, external clock
77 X2 period ^a
77 X2 high time, external clock
77 X2 low time, external clock
Input setup time
81 _ISE
81
Input hold time
ISE, NMI, RXD1, RXD2
82 Reset time
R.E. X1 to next R.E. X1
At 2V level (Both Edges)
At 0.8V level (Both Edges)
R.E. X2 to next R.E. X2
At 2V level (both edges)
At 0.8V level (both edges)
Before R.E. CLK
After R.E. CLK
Reset active to reset end
Input Signals
Input Pulse Width
USART Input Signals
t_Is
t_{I h}
t_CLKX
t_{R X S}
t_RXH
80
Input setup time
RXDn (asynchronous mode)
80
Input hold time
RXDn (asynchronous mode)
81
CKXn input period
(synchronous mode)
RDXn setup time
81 _{(synchronous mode)}
81
RDXn hold time
(synchronous mode)
Before R.E. CLK
After R.E. CLK
Before F.E. CKX in synchronous mode
After F.E. CKX in synchronous mode
MICROWIRE / SPI Input Signals
t_MSKh
t_MSKl
83 MICROWIRE Clock High
83 MICROWIRE Clock Low
At 2.0V (both edges)
At 0.8V (both edges)
Min (ns) Max (ns)
40
0.5 Tclk - 4
0.5 Tclk - 4
10,000
0.5 Tclk - 500
0.5 Tclk - 500
12
0
4Tclk
1*Tclk+13
12
0
200
4
2
80
80
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