LMC6462_14 Datasheet, PDF (15/32 Pages) National Semiconductor (TI) – LMC6462 Dual/LMC6464 Quad Micropower, Rail-to-Rail Input and Output CMOS

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LMC6462, LMC6464
SNOS725D – MAY 1999 – REVISED MARCH 2013
Figure 40. Canceling the Effect of Input Capacitance
The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor
(as in Figure 40 ), C_F, is first estimated by:
(1)
or
R₁ C_IN ≤ R₂ C_F
(2)
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or smaller than that of a breadboard, so the actual optimum
value for C_F may be different. The values of C_F should be checked on the actual circuit. (Refer to the LMC660
quad CMOS amplifier data sheet for a more detailed discussion.)
Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in Figure 41 and Figure 42. Large value resistances and
potentiometers are used to reduce power consumption while providing typically ±2.5 mV of adjustment range,
referred to the input, for both configurations with V_S = ±5V.
Figure 41. Inverting Configuration Offset Voltage Adjustment
Figure 42. Non-Inverting Configuration Offset Voltage Adjustment
SPICE Macromodel
A Spice macromodel is available for the LMC6462/4. This model includes a simulation of:
• Input common-mode voltage range
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