SCAN921025 Datasheet, PDF (14/21 Pages) National Semiconductor (TI) – 30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST

AC Timing Diagrams and Test Circuits (Continued)
V_OD = (DO⁺)–(DO^−).
Differential output signal is shown as (DO+)–(DO−), device in Data Transfer mode.
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FIGURE 17. V_OD Diagram
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