LMC7111 Datasheet, PDF (12/18 Pages) National Semiconductor (TI) – Tiny CMOS Operational Amplifier with Rail-to-Rail Input

Application Information (Continued)
Low Supply Current. The typical 25 µA supply current of
the LMC7111 extends battery life in portable applications,
and may allow the reduction of the size of batteries in some
applications.
Wide Voltage Range. The LMC7111 is characterized at
2.7V, 3V, 3.3V, 5V and 10V. Performance data is provided at
these popular voltages. This wide voltage range makes the
LMC7111 a good choice for devices where the voltage may
vary over the life of the batteries.
2.0 Input Common Mode
Voltage Range
The LMC7111 does not exhibit phase inversion when an in-
put voltage exceeds the negative supply voltage.
The absolute maximum input voltage is 300 mV beyond ei-
ther rail at room temperature. Voltages greatly exceeding
this maximum rating can cause excessive current to flow in
or out of the input pins, adversely affecting reliability.
Applications that exceed this rating must externally limit the
maximum input current to ±5 mA with an input resistor as
shown in Figure 1.
DS012352-12
FIGURE 2. Resistive Isolation
of a 330 pF Capacitive Load
4.0 Compensating for Input
Capacitance when Using Large
Value Feedback Resistors
When using very large value feedback resistors, (usually
> 500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 3), C_f is first estimated by:
DS012352-14
FIGURE 1. R_I Input Current Protection for
Voltages Exceeding the Supply Voltage
3.0 Capacitive Load Tolerance
The LMC7111 can typically directly drive a 300 pF load with
V_S = 10V at unity gain without oscillating. The unity gain fol-
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 2. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
or
R₁ C_IN ≤ R₂ C_f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C_F may be different. The values of C_F should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS012352-13
FIGURE 3. Cancelling the Effect of Input Capacitance
5.0 Output Swing
The output of the LMC7111 will go to within 100 mV of either
power supply rail for a 10 kΩ load and to 20 mV of the rail for
a 100 kΩ load. This makes the LMC7111 useful for driving
transistors which are connected to the same power supply.
By going very close to the supply, the LMC7111 can turn the
transistors all the way on or all the way off.
6.0 Biasing GaAs RF Amplifiers
The capacitive load capability, low current draw, and small
size of the SOT23-5 LMC7111 make it a good choice for pro-
viding a stable negative bias to other integrated circuits.
The very small size of the LMC7111 and the LM4040 refer-
ence take up very little board space.
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