DS90CR288A Datasheet, PDF (11/20 Pages) National Semiconductor (TI) – 28-Bit Channel Link-85MHz

AC λΠϛϯάਤ ( ͖ͭͮ)
C ᴷηοτΞοϓ / ϗʔϧυɾλΠϜ ( ಺෦σʔλɾαϯϓϦϯά௕ ) ͸ Rspos (Ϩγʔόೖྗετϩʔϒɾϙδγϣϯ ) min ͱ max ʹΑΓఆٛ͞Ε·͢ɻ
Tppos ᴷτϥϯεϛολग़ྗύϧεɾϙδγϣϯ (minͱ max)
RSKM ʾέʔϒϧɾεΩϡʔʴιʔεɾΫϩοΫɾδολ ( ࿈ଓ͢Δ 2 ΫϩοΫؒ ) (Note 7) ʴ ISI ( ఻ૹ೾ׯܗব ) (Note 8)
έʔϒϧɾεΩϡʔᴷ௨ৗ 10 ʙ 40ps/300mmɺέʔϒϧʹΑΓҟͳΓ·͢ɻ
Note 7: δολ͸ 85MHz Ͱ 150ps ҎԼɻ
Note 8: ISI ͸಺෦഑ઢʹΑΓ·͢ɻ
FIGURE 16. Receiver LVDS Input Skew Margin
DS90CR287 MTD56 (TSSOP) ύοέʔδ୺ࢠઆ໌ʵνϟωϧɾϦϯΫɾτϥϯεϛολ
୺ࢠ໊
TxIN
TxOUT Ê´
TxOUT ʵ
TxCLK IN
I/O No.
I 28
O4
O4
I1
TxCLK OUT Ê´ O 1
TxCLK OUT ʵ O 1
PWR DOWN I 1
V_CC
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
I4
I5
I1
I2
I1
I3
TTL Ϩϕϧೖྗɻ
આ໌
ਖ਼ͷ LVDS ࠩಈσʔλग़ྗ
ෛͷ LVDS ࠩಈσʔλग़ྗ
TTLϨϕϧͷΫϩοΫೖྗɻ্ཱ͕ͪΓΤοδ͕σʔλऔΓࠐΈʹ࢖༻͞Ε·͢ɻ୺ࢠ໊͸ TxCLK
IN Ͱ͢ɻʮΞϓϦέʔγϣϯ৘ใʯΛࢀরͯ͠Լ͍͞ɻ
ਖ਼ͷ LVDS ࠩಈΫϩοΫग़ྗ
ෛͷ LVDS ࠩಈΫϩοΫग़ྗ
TTLϨϕϧೖྗɻೖྗ͕ Low ʹΞαʔτ͞ΕΔͱɺग़ྗ͸ TRI-STATE ʹͳΓɺύϫʔɾμ΢ϯ࣌ʹ
௿ిྲྀͱͳΓ·͢ɻʮΞϓϦέʔγϣϯ৘ใʯΛࢀরͯ͠Լ͍͞ɻ
TTL ೖྗ༻ͷిݯϐϯ
TTL ೖྗ༻ͷάϥ΢ϯυɾϐϯ
PLL ༻ͷిݯϐϯ
PLL ༻ͷάϥ΢ϯυɾϐϯ
LVDS ग़ྗ༻ͷిݯϐϯ
LVDS ग़ྗ༻ͷάϥ΢ϯυɾϐϯ
DS90CR287 SLC64A (FBGA) ύοέʔδ୺ࢠཁ໿ʵνϟωϧɾϦϯΫɾτϥϯεϛολ
୺ࢠ໊
I/O No.
આ໌
TxIN
I 28 TTL Ϩϕϧೖྗɻ
TxOUT Ê´
O 4 ਖ਼ͷ LVDS ࠩಈσʔλग़ྗ
TxOUT ʵ
O 4 ෛͷ LVDS ࠩಈσʔλग़ྗ
TxCLK IN
I 1 _{TTL ϨϕϧͷΫϩοΫೖྗɻ ্ཱ͕ͪΓΤοδ͕σʔλऔΓࠐΈʹ࢖༻͞Ε·͢ɻ ୺ࢠ໊͸ TxCLK}
IN Ͱ͢ɻʮΞϓϦέʔγϣϯ৘ใʯΛࢀরͯ͠Լ͍͞ɻ
TxCLK OUT ʴ O 1 ਖ਼ͷ LVDS ࠩಈΫϩοΫग़ྗ
TxCLK OUT ʵ O 1 ෛͷ LVDS ࠩಈΫϩοΫग़ྗ
PWR DOWN
V_CC
GND
I 1 _{TTL Ϩϕϧೖྗɻ ೖྗ͕ Low ʹΞαʔτ͞ΕΔͱɺग़ྗ͸ TRI-STATE ʹͳΓɺύϫʔɾμ΢ϯ࣌}
ʹ௿ిྲྀͱͳΓ·͢ɻʮΞϓϦέʔγϣϯ৘ใʯΛࢀরͯ͠Լ͍͞ɻ
I 4 TTL ೖྗ༻ͷిݯϐϯ
I 5 TTL ೖྗ༻ͷάϥ΢ϯυɾϐϯ
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