DS91C176_08 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – 100 MHz Single Channel M-LVDS Transceivers

February 29, 2008
DS91D176/DS91C176
100 MHz Single Channel M-LVDS Transceivers
General Description
The DS91C176 and DS91D176 are 100 MHz single channel
M-LVDS (Multipoint Low Voltage Differential Signaling)
transceivers designed for applications that utilize multipoint
networks (e.g. clock distribution in ATCA and uTCA based
systems). M-LVDS is a new bus interface standard (TIA/
EIA-899) optimized for multidrop networks. Controlled edge
rates, tight input receiver thresholds and increased drive
strength are sone of the key enhancments that make M-LVDS
devices an ideal choice for distributing signals via multipoint
networks.
The DS91C176/DS91D176 are half-duplex transceivers that
accept LVTTL/LVCMOS signals at the driver inputs and con-
vert them to differential M-LVDS signals. The receiver inputs
accept low voltage differential signals (LVDS, B-LVDS, M-
LVDS, LV-PECL and CML) and convert them to 3V LVCMOS
signals. The DS91D176 has a M-LVDS type 1 receiver input
with no offset. The DS91C176 has an M-LVDS type 2 receiver
which enable failsafe functionality.
Features
■ ^{DC to 100+ MHz / 200+ Mbps low power, low EMI}
operation
■ ^{Optimal for ATCA, uTCA clock distribution networks}
■ ^{Meets or exceeds TIA/EIA-899 M-LVDS Standard}
■ ^{Wide Input Common Mode Voltage for Increased Noise}
Immunity
■ ^{DS91D176 has type 1 receiver input}
■ ^{DS91C176 has type 2 receiver with fail-safe}
■ ^{Industrial temperature range}
■ ^{Space saving SOIC-8 package}
Typical Application in an ATCA Clock Distribution Network
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