CD4071BM Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Quad 2-Input OR, AND Buffered B Series Gate

February 1988
CD4071BM CD4071BC
Quad 2-Input OR Buffered B Series Gate
CD4081BM CD4081BC
Quad 2-Input AND Buffered B Series Gate
General Description
These quad gates are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-chan-
nel enhancement mode transistors They have equal source
and sink current capabilities and conform to standard B se-
ries output drive The devices also have buffered outputs
which improve transfer characteristics by providing very
high gain
All inputs protected against static discharge with diodes to
V_DD and V_SS
Features
Y _{Low power TTL}
compatibility
Fan out of 2 driving 74L
or 1 driving 74LS
Y _{5V – 10V – 15V parametric ratings}
Y _{Symmetrical output characteristics}
Y _{Maximum input leakage 1 mA at 15V over full tempera-}
ture range
Connection Diagrams
CD4071B Dual-In-Line Package
Top View
CD4081B Dual-In-Line Package
TL F 5977 – 3
Top View
Order Number CD4071B or CD4081B
TL F 5977 – 6
C1995 National Semiconductor Corporation TL F 5977
RRD-B30M105 Printed in U S A