ADC08D1020_08 Datasheet, PDF (1/44 Pages) National Semiconductor (TI) – Low Power, 8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/D Converter

February 5, 2008
ADC08D1020
Low Power, 8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/D
Converter
General Description
The ADC08D1020 is a dual, low power, high performance,
CMOS analog-to-digital converter that builds upon the AD-
C08D1000 platform. The ADC08D1020 digitizes signals to 8
bits of resolution at sample rates up to 1.3 GSPS. It has ex-
panded features compared to the ADC08D1000, which in-
clude a test pattern output for system debug, a clock phase
adjust, and selectable output demultiplexer modes. Consum-
ing a typical 1.6 Watts in non-demultiplex mode at 1 GSPS
from a single 1.9 Volt supply, this device is guaranteed to have
no missing codes over the full operating temperature range.
The unique folding and interpolating architecture, the fully dif-
ferential comparator design, the innovative design of the in-
ternal sample-and-hold amplifier and the calibration schemes
enable a very flat response of all dynamic parameters beyond
Nyquist, producing a high 7.4 Effective Number of Bits
(ENOB) with a 498 MHz input signal and a 1 GHz sample rate
while providing a 10^−18 Code Error Rate (C.E.R.) Output for-
matting is offset binary and the Low Voltage Differential Sig-
naling (LVDS) digital outputs are compatible with IEEE
1596.3-1996, with the exception of an adjustable common
mode voltage between 0.8V and 1.2V.
Each converter has a selectable output demultiplexer which
feeds two LVDS buses. If the 1:2 demultiplexed mode is se-
lected, the output data rate is reduced to half the input sample
rate on each bus. When non-demultiplexed mode is selected,
that output data rate on channels DI and DQ are at the same
rate as the input sample clock. The two converters can be
interleaved and used as a single 2 GSPS ADC.
The converter typically consumes less than 3.5 mW in the
Power Down Mode and is available in a leaded or lead-free
128-lead, thermally enhanced, exposed pad, LQFP and op-
erates over the Industrial (-40°C ≤ T_A ≤ +85°C) temperature
range.
Features
■ ^{Single +1.9V ±0.1V Operation}
■ ^{Interleave Mode for 2x Sample Rate}
■ ^{Multiple ADC Synchronization Capability}
■ ^{Adjustment of Input Full-Scale Range, Offset, and Clock}
Phase Adjust
■ ^{Choice of SDR or DDR output clocking}
■ ^{1:1 or 1:2 Selectable Output Demux}
■ ^{Second DCLK output}
■ ^{Duty Cycle Corrected Sample Clock}
■ ^{Test pattern}
Key Specifications
■ ^Resolution
8 Bits
■ ^{Max Conversion Rate}
1 GSPS (min)
■ ^{Code Error Rate}
10^−18 (typ)
■ ^{ENOB @ 498 MHz Input (Normal Mode) 7.4 Bits (typ)}
■ ^DNL
±0.15 LSB (typ)
■ ^{Power Consumption}
— Operating in Non-demux Output
— Operating in 1:2 Demux Output
— Power Down Mode
1.6 W (typ)
1.7 W (typ)
3.5 mW (typ)
Applications
■ ^{Direct RF Down Conversion}
■ ^{Digital Oscilloscopes}
■ ^{Satellite Set-top boxes}
■ ^{Communications Systems}
■ ^{Test Instrumentation}
Ordering Information
Industrial Temperature Range (-40°C < T_A < +85°C)
ADC08D1020CIYB
ADC08D1020CIYB/NOPB
ADC08D1020DEV
NS Package
Leaded 128-Pin Exposed Pad LQFP
Lead-free 128-Pin Exposed Pad LQFP
Development Board
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