SM8703CV Datasheet, PDF (9/12 Pages) Nippon Precision Circuits Inc – Clock Generator for DVD Players

SM8703CV
Table 2. Mode register function
Bit
D9
D8
D7
D6
D5
D4
D3/D2/D1/D0
Name
RSV
CE5
CE4
CE3
CE2
CE1
RSV
Function
Must be "LOW"
SO2 output enable/disable
SO3, SO4 output enable/disable
SO5 output enable/disable
SO1 output enable/disable
MO1, MO2 output enable/disable
Must be "LOW"
Table 3. Clock output control settings (CE5 to 1)
CE5 to CE1
LOW
HIGH
Clock output
Disable (Output fixed "LOW")
Enable (Default)
Note
The output frequency changes depending on the MDT pin function (as MDT and FSEL, the sampling frequency
select signal input, share a common pin). Refer to the section “Settling Time (when the sampling frequency is
changed)”.
MCK
FSEL/MDT
MLEN
SO2 to 5
Stable
MREG (16bit data)
Unstable
Figure 5. Serial transfer timing
ts
Stable
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