SM8703CV Datasheet, PDF (8/12 Pages) Nippon Precision Circuits Inc – Clock Generator for DVD Players

SM8703CV
Sampling Frequency and Output Clock Frequency
The SM8703CV generates several output clocks from the 27MHz master clock, with frequencies of 384fs
(SO2), 512fs (SO3, SO4) and 768fs (SO5), where fs is the sampling frequency selected by external control
inputs. SO1 outputs a 33.8688MHz clock. The supported sampling frequencies are 44.1kHz and 48kHz,
selected by the sampling frequency select pin (FSEL). The generated frequencies are shown in table 1.
Table 1. Sampling frequency and output clock frequency
FSEL
LOW
HIGH
Sampling
frequency fs
44.1kHz
48kHz
SO1
33.8688
33.8688
Output clock frequency [MHz]
SO2
SO3, SO4
16.9344
22.5792
18.4320
24.5760
SO5
33.8688
36.8640
Enable/Disable control
A 3-wire serial interface is provided using MCK (pin 4), MLEN (pin 5), and MDT (pin 23, MDT/FSEL).
Using serial control, each output frequency can be enabled (disabled when LOW) individually, or disabled to
prevent unwanted output.
MCK
FSEL/MDT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MLEN
Figure 3. Serial control format
The 16-bit mode register (MREG) is shown in Figure 4. The name and function of each bit are shown in Tables
2 and 3. Serial control is enabled by setting D15-D10 to "011100".
MREG 0 1 1 1 0 0 RSV CE5 CE4 CE3 CE2 CE1 RSV RSV RSV RSV
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 4. Mode register
Note: RSV is fixed LOW.
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