SM5837AF_06 Datasheet, PDF (7/10 Pages) Nippon Precision Circuits Inc – Variable-length 1H Delay Line LSI

SM5837AF
FUNCTIONAL DESCRIPTION
The SM5837AF provides a built-in 1H delay for video signal processing. The delay can be set to a length of 31
to 2078 clock delay bits. The delay length (L_H) can be set using 2 methods, selected by the state of PARA.
When PARA is HIGH, the delay length is set by parallel input data on DL0 to DL10. When PARA is LOW, the
delay length is set by serial input data using SDI, SICK and LEN. Accordingly, the function of DL0/SDI,
DL1/SICK and DL2/LEN is determined by PARA.
Parallel Input Set Method (PARA, DL0 to DL10)
When PARA is HIGH, parallel input data is used to set the delay length. The delay length (L_H) is determined
by the input data on DL0 to DL10 as shown in equation 1 and table 1.
10
L_H = 31 + _Σ {DLk × 2^k}
(1)
k=0
Table 1. Delay bit length setting
DL10 DL9
DL8
DL7
DL6
DL5
DL4
DL3
DL2
DL1
DL0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
0
0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
1
1
0
0
0
1
0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
0
1
1
1
1
1
0
0
0
0
1
0
1
1
1
1
1
0
0
0
1
0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
Delay length
31
32
33
34
35
↓
512
513
↓
1024
1025
↓
2048
2049
↓
2077
2078
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