SM5842AP Datasheet, PDF (12/23 Pages) Nippon Precision Circuits Inc – High-Class Audio Multi-function Digital Filter

SM5842AP/APT
FUNCTIONAL DESCRIPTION
The basic arithmetic block is shown in figure 1, and
the function of each block is described in the follow-
ing sections.
Input
fs
2-times interpolator
1st FIR, 169-tap
2fs
2-times interpolator
2nd FIR, 29-tap
4fs
Deemphasis OFF
Deemphasis IIR filter
Deemphasis ON
4fs
Soft mute
4fs
2-times interpolator
3rd FIR, 17-tap
8fs
Output
Figure 1. Arithmetic block diagram
8-times Oversampling (Interpolation)
The interpolation arithmetic block is comprised of 3
cascaded, 2-times FIR interpolation filters, as shown
in figure 1.
The input signal is sampled at rate fs, and then 8-
times oversampling data is output. Sampling noise in
the 0.5465fs to 7.4535fs stopband is removed by the
interpolation filter.
Digital Deemphasis
The digital deemphasis filter has the same construc-
tion as analog filters. It is implemented as an IIR fil-
ter to faithfully reproduce the gain and phase
characteristics of standard analog deemphasis filters.
The three sets of filter coefficients for the three fs =
32.0/44.1/48.0 kHz sampling frequencies are
selected by FSEL1 and FSEL2 when the sampling
frequency is specified, as shown in table 1. Indepen-
dent deemphasis for the left and right channel is con-
trolled independently by DEMPL and DEMPR,
respectively. Digital deemphasis is ON when
DEMPL/DEMPR is HIGH, and OFF when
DEMPL/DEMPR is LOW.
Table 1. Sampling frequency select
FSEL1
LOW
LOW
HIGH
HIGH
FSEL2
LOW
HIGH
LOW
HIGH
Sampling frequency (fs)
44.1 kHz
48 kHz
Invalid setting
32 kHz
NIPPON PRECISION CIRCUITS—12