MC-458CA721ESA Datasheet, PDF (8/16 Pages) NEC – 8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM

MC-458CA721ESA, 458CA721PSA
Synchronous Characteristics
Parameter
Symbol
-A 80
MIN.
MAX.
-A 10
Unit
MIN.
MAX.
Clock cycle time
/CAS latency = 3
tCK3
8
(125 MHz) 10 (100 MHz) ns
/CAS latency = 2
tCK2
10 (100 MHz) 13
(77 MHz) ns
Access time from CLK
/CAS latency = 3
tAC3
6
6
ns
/CAS latency = 2
tAC2
6
7
ns
CLK high level width
tCH
3
3
ns
CLK low level width
tCL
3
3
ns
Data-out hold time
tOH
3
3
ns
Data-out low-impedance time
tLZ
0
0
ns
Data-out high-impedance time
/CAS latency = 3
tHZ3
3
6
3
6
ns
/CAS latency = 2
tHZ2
3
6
3
7
ns
Data-in setup time
tDS
2
2
ns
Data-in hold time
tDH
1
1
ns
Address setup time
tAS
2
2
ns
Address hold time
tAH
1
1
ns
CKE setup time
tCKS
2
2
ns
CKE hold time
tCKH
1
1
ns
CKE setup time (Power down exit)
tCKSP
2
2
ns
Command (/CS0, /RAS, /CAS, /WE,
tCMS
2
2
ns
DQMB0 - DQMB7) setup time
Command (/CS0, /RAS, /CAS, /WE,
tCMH
1
1
ns
DQMB0 - DQMB7) hold time
Note 1. Output load
Output
Z = 50 Ω
50 pF
Note
1
1
1
Remark These specifications are applied to the monolithic device.
8
Data Sheet M14494EJ2V0DS00