MC-458CA721ESA Datasheet, PDF (11/16 Pages) NEC – 8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM

MC-458CA721ESA, 458CA721PSA
Byte No.
Function Described
32 Command and address
-A80
signal setup time
-A10
33 Command and address
-A80
signal hold time
-A10
34 Data signal input setup time -A80
-A10
35 Data signal input hold time
-A80
-A10
36-61
62 SPD revision
-A80
-A10
63 Checksum
-A80
for bytes 0 - 62
-A10
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency -A80
-A10
127 Intel specification /CAS
-A80
latency support
-A10
(2/2)
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
20H 0
0
1
0
0
0
0
0 2 ns
20H 0
0
1
0
0
0
0
0 2 ns
10H 0
0
0
1
0
0
0
0 1 ns
10H 0
0
0
1
0
0
0
0 1 ns
20H 0
0
1
0
0
0
0
0 2 ns
20H 0
0
1
0
0
0
0
0 2 ns
10H 0
0
0
1
0
0
0
0 1 ns
10H 0
0
0
1
0
0
0
0 1 ns
00H 0
0
0
0
0
0
0
0
12H 0
0
0
1
0
0
1
0 1.2 A
12H 0
0
0
1
0
0
1
0 1.2 A
01H 0
0
0
0
0
0
0
1
67H 0
1
1
0
0
1
1
1
64H 0
1
1
0
0
1
0
0 100 MHz
64H 0
1
1
0
0
1
0
0 100 MHz
87H 1
0
0
0
0
1
1
1
85H 1
0
0
0
0
1
0
1
Timing Chart
Refer to the SYNCHRONOUS DRAM MODULE TIMING CHART Information (M13348E).
Data Sheet M14494EJ2V0DS00
11