UPD75517 Datasheet, PDF (28/180 Pages) NEC – 4 BIT SINGLE-CHIP MICROCOMPUTER

µPD75517(A)
76
0000H MBE RBE
0002H MBE RBE
0004H MBE RBE
0006H MBE RBE
0008H MBE RBE
000AH MBE RBE
000CH MBE RBE
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
3FFFH
4000H
4FFFH
5000H
5F7FH
Fig. 3-2 Program Memory Map
0
Internal reset start address
(high-order 6 bits)
Internal reset start address
(low-order 8 bits)
INTBT/INT4 start address
INTBT/INT4 start address
INT0 start address
INT0 start address
INT1 start address
INT1 start address
INTCSI0 start address
INTCSI0 start address
INTT0 start address
INTT0 start address
INTTPG start address
INTTPG start address
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
CALLF
!faddr
instruction
entry
address
BRCB
!caddr
instruction
branch
address BR !addr
instruction
branch
address
CALL !addr
instruction
branch
address
GETI instruction reference table
Branch/call
address specified
in GETI
insturction
BR BCDE
BR BCXA
branch address
BRA !addr
instruction
branch address
BRCB !caddr instruction
branch address
BRCB !caddr instruction
branch address
BRCB !caddr instruction
branch address
BRCB !caddr instruction
branch address
CALLA !addr
instruction branch
address
BR $addr
instruction
relative
branch address
(–15 to –1,
+2 to +16)
BRCB !caddr instruction
branch address
Caution The start address of an interrupt vector shown above consists of 14 bits. So, the start address
must be set within a 16K-byte space (0000H to 3FFFH).
Remark In addition to the above, the BR PCDE and BR PCXA instructions can cause a branch to an address
with only the low-order 8 bits of the PC changed.
28