UPD78320 Datasheet, PDF (18/88 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78320, 78322
(2) CALLT table area
32 tables of call addresses of 1-byte call instruction (CALLT) can be stored in the 0040H to 007FH 64-byte area.
If bit 1 (TPF) of CPU control word (CCW) is set to 1, the 8040H to 807FH external memory area is used as a CALLT
instruction table in place of 0040H to 007FH.
(3) CALLF entry area
The 0800H to 0FFFH area can be directly subroutine-called by 2-byte call instruction (CALLF).
(4) Internal RAM area
A 640-byte RAM is built in FC80H to FEFFH area.
This area is composed of the following 2 RAMs.
• Peripheral RAM : FC80H to FDFFH (384 bytes)
• Main RAM
: FE00H to FEFFH (256 bytes)
The main RAM can be accessed at high speed.
In the main RAM area, the macro service control word and general register group composed of 8 register banks are
mapped onto the 36 bytes from FE06H to FE2BH and the 128 bytes from FE80H to FEFFH, respectively.
(5) Special function register (SFR) area
Registers having specially assigned functions, such as on-chip peripheral hardware mode registers and control
registers, are mapped in the FF00H to FFFFH area. Addresses without mapped registers cannot be accessed.
(6) External memory area
The µPD78322 can add external memories (ROM, RAM) to the 48K-byte (4000H to FFFFH) area gradually.
The µPD78320 can connect external memories (ROM, RAM) to the 64K-byte (0000H to FFFFH) area.
Each external memory can be accessed using P40/AD0 to P47/AD7 (multiplexed address/data bus), P50/A8 to P57/
A15 (address bus) and RD, WR and ASTB signals.
The external access area is mapped in the FFD0H to FFDFH 16-byte area of the special function register (SFR). In
this way, the external memory can be accessed by SFR addressing.
Dedicated pins (TAS and TMD pins) are provided to connect turbo access manager (µPD71P301)^Note. If the
µPD71P301 is used, the program processing speed equal to that of the internal ROM can be obtained.
Note Maintenance product
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