MC-45D32CC721 Datasheet, PDF (11/16 Pages) NEC – 32 M-WORD BY 72-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-45D32CC721
Byte No.
Function Described
32 Command and address signal input
setup time
33 Command and address signal input
hold time
34 Data signal input setup time
35 Data signal input hold time
36-61
62 SPD revision
63 Checksum for bytes 0 - 62
-C75
-C80
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91 Revision Code
93-94 Manufacturing date
95-99 Assembly serial number
100-127 Mfg specific
(2/2)
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Notes
C0H 1
1
0
0
0
0
0
0 1.2 ns
C0H 1
1
0
0
0
0
0
0 1.2 ns
60H 0
1
1
0
0
0
0
0 0.6 ns
60H 0
1
1
0
0
0
0
0 0.6 ns
00H 0
0
0
0
0
0
0
0
2FH 0
0
1
0
1
1
1
1
55H 0
1
0
1
0
1
0
1
00H 0
0
0
0
0
0
0
0
Timing Chart
Refer to the µPD45D128442, 45D128842, 45D128164 Data sheet (M13852E).
Preliminary Data Sheet M14900EJ1V0DS00
11