DRV8809 Datasheet, PDF (38/44 Pages) Texas Instruments – COMBINATION MOTOR DRIVERS WITH DC-DC CONVERTERS

DRV8809
DRV8810
SLVS854A – JULY 2008 – REVISED JULY 2008 ............................................................................................................................................................... www.ti.com
InReset
nORT
10 us
Figure 32. Shutdown by In-Reset
Blanking Time Insertion Timing for DC Motor Driving
For the DC motor driving H-bridge, tBlank is inserted at each phase reversal and also following each chopping
cycle (once every eight OSCM clocks).
For a large n number (5 or 6) tBlank setup may decrease the itrip detect window. The user must be careful to
optimize in the system.
Case A: Phase duty = 25%
Case A*1 for setup bit = (1,0)
Case A*2 for setup bit = (0,1)
OSCM
Phase
fChop
tBlank
(1,0) *1
tBlank
(0,1) *2
Resync
n=3
Resync
8 x OSCM clocks
n=3
n=3
Resync
n=3
(n=6)
n=6
n=6
(n=6)
*1 : Setup register bit <4,3> = ( 1,0 ) : tBlank = OSCM clock x 3 (or bit <5,6> for H-bridge C,D channel )
*2 : Setup register bit <4,3> = ( 0,1 ) : tBlank = OSCM clock x 6 (or bit <5,6> for H-bridge C,D channel )
Figure 33. Blanking Time Insertion Timing, Case A
Resync
n=3
n=6
Case B: Phase duty = 40%
Case B*1 for setup bit =(1,0)
Case B*2 for setup bit =(0,1)
38
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