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CSTCW24M0X53-R0 Datasheet, PDF (19/32 Pages) Murata Manufacturing Co., Ltd. – Ceramic Resonator
P17E.pdf
2012.10.31 Note • Please read rating and CAUTION (for storage, operating, rating, soldering, mounting and handling) in this catalog to prevent smoking and/or burning, etc.
• This catalog has only typical specifications because there is no space for detailed specifications. Therefore, please review our product specifications or consult the approval sheet for product specifications before ordering.
4 Applications of Typical Oscillation Circuits
As described in Chapter 2, the most common oscillation
circuit with CERALOCK® is to replace L of a Colpitts
circuit with CERALOCK®. The design of the circuit
varies with the application and the IC being used, etc.
Although the basic configuration of the circuit is the
same as that of a quartz crystal, the difference in
mechanical Q results in the difference of the circuit
constant.
This chapter briefly describes the characteristics of the
oscillation circuit and gives some typical examples.
1. Cautions for Designing Oscillation Circuits
It is becoming more common to configure the oscillation
circuit with a digital IC, and the simplest way is to use
an inverter gate.
Fig. 4-1 shows the configuration of a basic oscillation
circuit with a C-MOS inverter.
INV. 1 works as an inverter amplifier of the oscillation
circuit. INV. 2 acts to shape the waveform and also acts
as a buffer for the connection of a frequency counter.
The feedback resistance Rf provides negative feedback
around the inverter in order to put it in the linear
region, so the oscillation will start, when power is
applied.
If the value of Rf is too large, and if the insulation
resistance of the input inverter is accidentally
decreased, oscillation will stop due to the loss of loop
gain. Also, if Rf is too great, noise from other circuits
can be introduced into the oscillation circuit.
Obviously, if Rf is too small, loop gain will be low. An Rf
of 1MΩ is generally used with a ceramic resonator.
Damping resistor Rd provides loose coupling between
the inverter and the feedback circuit and decreases the
loading on the inverter, thus saving energy.
In addition, the damping resistor stabilizes the phase of
the feedback circuit and provides a means of reducing
the gain in the high frequency area, thus preventing the
possibility of spurious oscillation.
Load capacitance CL1 and CL2 provide the phase lag of
180°.
The proper selected value depends on the application,
the IC used, and the frequency.
VDD
INV.1
INV.2
Output
4
IC
IC
X
CL1
Rd
CL2
IC : 1/6TC4069UBP(TOSHIBA)
X : CERALOCK®
CL1, CL2 : External Capacitance
Rd : Dumping Resistor
Fig. 4-1 Basic Oscillation Circuit with C-MOS Inverter
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