MC68341UMAD Datasheet, PDF (7/21 Pages) Motorola, Inc – Integrated Processor Users Manual

stable value, the 328*TCLKIN delay is counted down, and VCO lock is set after completion of the 328 clock
delay. For external clock mode without VCO, the 328*TCLKIN delay starts as soon as EXTAL clock transitions
are recognized. See note for page11-3 for more POR information.
19. Internal IMB Arbitration
On page 4-6, first paragraph, change the first sentence to read “There are eight arbitration levels for the various
bus masters on the MC68341 to access the inter-module bus (IMB).”
20. Additional Note for External Clock Mode with PLL
On page 4-9, Table 4-1, External Clock Mode with PLL: the PLL phase locks the CLKOUT falling edge to the
falling edge of the EXTCLK input clock. Maximum skew between falling edges of the EXTCLK and CLKOUT
signals is specified in the Section 12 Electrical Characteristics.
21. External Clock Mode Operation
The next-to-last paragraph on page 4-11 incorrectly states that the SYNCR V, W, X, Y, and Z bits can all affect
the system frequency in external clock mode. In external clock mode only the V bit affects the system frequen-
cy, by selecting either EXTCLK or EXTCLK/2 as reference input to the phase comparator. The VCO frequency
divided by 2 is used both for CLKOUT as well as the feedback input to the phase comparator. A reset forces
V=0, resulting in an initial processor operating frequency of 1/2 the EXTCLK frequency.
For applications using external clock mode, the 32KHz crystal connected to EXTAL and XTAL is only required
if the realtime clock function is needed - ground EXTAL if the RTC is not used. Also, the clock input on EXT-
CLK should be very clean when the 32KHz oscillator is used. Excessive undershoot or overshoot, as well as
fast edge rates may result in coupling to the adjacent XTAL input, affecting operation of the 32kHz oscillator.
22. Recommended XFC Capacitor Values
On page 4-12, third paragraph, and page 11-2, last paragraph: The XFC capacitor recommendation of 0.01µF
to 0.1µF applies specifically to crystal mode operation. When using external clock with VCO mode, for phase
detector refernce frequencies > 1MHz start with a capacitance value of 10000pf/F_MHz. For example at
16.0MHz the recommended XFC capacitance is approximately 10000pf/16.0 = 625pf - choose the next higher
standard value available.
23. CLKOUT and VCO Frequency Programming
On pages 4-13 and 4-14, the column for W=1:Z=0:X=1 is incorrect - the correct value for each entry in this
column is 2x the frequency in the X=0 column immediately to the left. A corrected table is shown on the follow-
ing pages. Note that although a complete table is shown for all W:X:Y:Z combinations, both CLKOUT and VCO
frequency limits must be observed when programming the SYNCR. For example, a system operating frequen-
cy (CLKOUT) of 25.16MHz can be selected with W:X:Y:Z=1:1:23:1, resulting in a VCO frequency of 50.3MHz.
However, programming W:X:Y:Z=1:0:47:1 to achieve the same system frequency would result in a VCO fre-
quency of greater than 100MHz, which is outside the spec VCO frequency operating range.
24. Additional Note for Global Chip Select
On page 4-16, section 4.2.4.2: When operating as a global chip select, CS0 does not assert for accesses to
either the MBAR or to internal peripheral module registers.
MOTOROLA
MC68341 USER’S MANUAL ADDENDUM
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