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MC54-74HC595A Datasheet, PDF (6/10 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS
MC54/74HC595A
SHIFT
CLOCK
OUTPUT
SQH
tr
tf
90%
50%
10%
tw
90%
50%
10%
1/fmax
tPLH
tPHL
tTLH
tTHL
Figure 1.
LATCH
CLOCK
50%
QA–QH
90%
50%
OUTPUTS 10%
tPLH tPHL
tTLH tTHL
Figure 3.
SERIAL
INPUT A
LATCH
CLOCK
VALID
50%
tsu
th
50%
Figure 5.
SWITCHING WAVEFORMS
VCC
GND
VCC
GND
RESET
OUTPUT
SQH
SHIFT
CLOCK
OUTPUT
ENABLE
OUTPUT Q
OUTPUT Q
tw
VCC
50%
GND
tPHL
50%
trec
VCC
50%
GND
Figure 2.
50%
tPZL tPLZ
50%
tPZH tPHZ
50%
Figure 4.
VCC
GND
HIGH
IMPEDANCE
10% VOL
90% VOH
HIGH
IMPEDANCE
SHIFT
VCC
CLOCK
50%
VCC
GND
GND
tsu
LATCH
VCC
VCC
CLOCK
50%
GND
GND
tw
Figure 6.
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
TEST CIRCUITS
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kΩ
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
* Includes all probe and jig capacitance
Figure 7.
* Includes all probe and jig capacitance
Figure 8.
MOTOROLA
6
High–Speed CMOS Logic Data
DL129 — Rev 6