BCP68T1 Datasheet, PDF (4/6 Pages) Motorola, Inc – MEDIUM POWER NPN SILICON HIGH CURRENT TRANSISTOR SURFACE MOUNT

BCP68T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
SOT-223
0.248
6.3
inches
mm
SOT-223 POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
collector pad size. This can vary from the minimum pad size
for soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction tempera-
ture of the die, R_θJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT-223
package, PD can be calculated as follows:
PD =
TJ(max) – TA
R_θJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD
=
150°C – 25°C
83.3°C/W
= 1.5 watts
The 83.3°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of R_θJA
versus collector pad area is shown in Figure 8.
160
Board Material = 0.0625″
140
G-10/FR-4, 2 oz Copper
0.8 Watts
TA = 25°C
° 120
100
1.25 Watts*
1.5 Watts
*Mounted on the DPAK footprint
80
0.0
0.2
0.4
0.6
0.8
1.0
A, Area (square inches)
Figure 8. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad™. Using a
board material such as Thermal Clad, an aluminum core board,
the power dissipation can be doubled using the same footprint.
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data