MC68040RC25A Datasheet, PDF (362/442 Pages) Motorola, Inc – Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
MC68LC040 REV2.3 (01/29/2000)
MC68LC040 is pin compatible with the MC68040 and the MC68EC040. Figure A-1 illus-
trates a simplified block diagram of the MC68LC040.
INSTRUCTION DATA BUS
INSTRUCTION
FETCH
DECODE
EFFECTIVE
ADDRESS
CALCULATE
EFFECTIVE
ADDRESS
FETCH
EXECUTE
WRITE-BACK
INTEGER UNIT
INSTRUCTION
ATC
INSTRUCTION
CACHE
INSTRUCTION
INSTRUCTION
ADDRESS
CACHE/ACCESS/SNOOP
CONTROLLER
B
INSTRUCTION MEMORY MANAGEMENT UNIT
U
S
DATA MEMORY MANAGEMENT UNIT
DATA
CACHE/ACCESS/SNOOP
CONTROLLER
C
O
N
T
R
O
L
L
E
DATA
R
ADDRESS
ADDRESS
BUS
DATA
BUS
BUS
CONTROL
SIGNALS
DATA
ATC
DATA
CACHE
OPERAND DATA BUS
Figure A-1. MC68LC040 Block Diagram
The main features of the MC68LC040 include:
• 22 MIPS Integer Performance at 25 MHz
• Independent Instruction and Data MMUs
• 4-Kbyte Physical Instruction Cache and 4-Kbyte Physical Data Cache Accessible Si-
multaneously
• 32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
• User-Object-Code Compatible with All M68000 Microprocessors
• Multimaster/Multiprocessor Support Via Bus Snooping
• Concurrent Integer Unit, MMU, Bus Controller, and Bus Snooper Operation Maximizes
Throughput
A-2
M68040 USER’S MANUAL
MOTOROLA
For More Information On This Product,
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