74HC541A Datasheet, PDF (3/6 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MC54/74HC541A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Condition
VCC
Guaranteed Limit
V –55 to 25°C ≤85°C ≤125°C Unit
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
±1.0
µA
IOZ
Maximum Three–State Leakage
Output in High Impedance State
6.0
±0.5
±5.0 ±10.0 µA
Current
Vin = VIL or VIH
Vout = VCC or GND
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0µA
6.0
4
40
160
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V –55 to 25°C ≤85°C
≤125°C Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
2.0
80
3.0
30
4.5
18
6.0
15
100
120
ns
40
55
23
28
20
25
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
110
3.0
45
4.5
25
6.0
21
140
165
ns
60
75
31
38
26
31
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
110
3.0
45
4.5
25
6.0
21
140
165
ns
60
75
31
38
26
31
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
60
3.0
22
4.5
12
6.0
10
75
90
ns
28
34
15
18
13
15
Cin
Cout
Maximum Input Capacitance
Maximum Three–State Output Capacitance (Output in High
Impedance State)
10
10
10
pF
15
15
15
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V, VEE = 0 V
CPD Power Dissipation Capacitance (Per Buffer)*
35
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
SWITCHING WAVEFORMS
tr
INPUT A
tPLH
OUTPUT Y
90%
50%
10%
90%
50%
10%
tTLH
tf
VCC
OE1 or OE2
GND
tPHL
OUTPUT Y
OUTPUT Y
tTHL
Figure 1.
50%
tPZL tPLZ
50%
tPZH tPHZ
50%
50%
10%
90%
Figure 2.
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
High–Speed CMOS Logic Data
3–3
DL129 — Rev 6
MOTOROLA