MTB3N120E Datasheet, PDF (1/12 Pages) Motorola, Inc – TMOS POWER FET 3.0 AMPERES 1200 VOLTS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTB3N120E/D
™ Designer's Data Sheet
TMOS E-FET.™
High Energy Power FET
MTB3N120E
Motorola Preferred Device
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
TMOS POWER FET
3.0 AMPERES
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
1200 VOLTS
RDS(on) = 5.0 OHM
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This high voltage
MOSFET uses an advanced termination scheme to provide
enhanced voltage–blocking capability without degrading perfor-
®
mance over time. In addition, this advanced TMOS E–FET is
designed to withstand high energy in the avalanche and commuta-
tion modes. This new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for low
D
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin G
against unexpected voltage transients.
• Avalanche Energy Capability Specified at Elevated Temperature
• Low Stored Gate Charge for Efficient Switching
CASE 418B–02, Style 2
D2PAK
S
• Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor Absorbs High Energy in the
Avalanche Mode
• Source–to–Drain Diode Recovery time Comparable to Discrete Fast Recovery Diode
* See App. Note AN1327 – Very Wide Input Voltage Range; Off–line Flyback Switching Power Supply
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous @ 25°C
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, PEAK IL = 4.5 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
E–FET and Designer’s are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
R_θJC
R_θJA
R_θJA
TL
Value
1200
1200
± 20
± 40
3.0
2.2
11
125
1.0
2.5
– 55 to 150
101
1.0
62.5
50
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
Motorola TMOS Power MOSFET Transistor Device Data
1
© Motorola, Inc. 1995