URA2405LD-15WR2 Datasheet, PDF (8/9 Pages) MORNSUN Science& Technology Ltd. – DUAL/SINGLE OUTPUT DIP PACKAGING, DC-DC CONVERTER

URA_LD-15WHR2A4S&URB_LD-15WHR2A4S DIN-RAIL MOUNTING OUTLINE DIMENSIONS
DIN-rail modules are fitting to TS35 rails
Footprint Details
Pin
1
2
3
Dual
Ctrl
GND
Vin
Single Ctrl
GND
Vin
4
5
6
-Vo
0V
+Vo
0V
Trim
+Vo
PACKAGE DIAGRAM
Special Package Series（A2S/A4S）
TEST CONFIGURATIONS
Input Reflected-Ripple Current Test Setup
Input reflected-ripple current is measured with an inductor Lin and Capacitor Cin to simulate source impedance.
Oscilloscope
Lin
DC DC ^Current
Cin Probe
Load
Lin(4.7µH) Cin(220µF, ESR < 1.0Ω at 100 KHz)
TRIM APPLICATION & TRIM RESISTANCE
Application circuit for TRIM (Part in broken line is the interior of models)
+Vo
+Vo
Formula for resistance of TRIM
R1
R3
Vre f
R2
RT
Trim
R1
R3
Vre f
R2
RT
Trim
up: RT =
a R2
R2 - a
- R3
a R1
down: RT = _R1-a -R3
Vref
a= _{Vo’-Vref} R1
Vo ’- Vr e f
a=
R2
Vr e f
0V
0V
Trim up
Trim down
Note: Leave open if not used. Value for R1, R2, R3, and Vref refer to the above table 1. R_T: Resistance of Trim. a: User-defined parameter, no actual
meanings. Vo’: The trim up/down voltage.
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URA_LD-15WR2 & URB_LD-15WR2 2013.11.29-A/3 Page 8of 9