M5M4V64S30ATP-8A Datasheet, PDF (44/51 Pages) Mitsubishi Electric Semiconductor – 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

SDRAM (Rev.1.3)
Mar'98
MITSUBISHI LSIs
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Mode Register Setting
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/CS
/RAS
/CAS
tRSC
tRC
tRCD
/WE
CKE
DQM
A0-8
M
X
Y
A10
X
A9,11
X
BA0,1
0
0
0
DQ
Auto-Ref (last of 8 cycles)
D0 D0 D0 D0
Mode ACT#0
Register
Setting
WRITE#0
Italic parameter indicates minimum case
MITSUBISHI ELECTRIC
44