PS22056_12 Datasheet, PDF (2/9 Pages) Mitsubishi Electric Semiconductor – Dual-In-Line Package Intelligent Power Module

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 2 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
C1 : Tight tolerance, temp-compensated electrolytic type
(Note : The capacitance depends on the PWM control
scheme used in the applied system.)
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering
Inrush current
limiter circuit
High-side input (PWM)
(5V line) (Note 1,2)
Input signal Input signal Input signal
conditioning conditioning conditioning
Level shifter Level shifter Level shifter
Protection
circuit (UV)
Protection
circuit (UV)
Protection
circuit (UV)
Drive circuit Drive circuit Drive circuit
P
C2
C1
(Note 6)
DIP-IPM
AC line input
C
Z
(Note 4)
NU
(Note 8) NV
NW
N1
VNC
CIN
H-side IGBTS
U
V
W
L-side IGBTS
M
AC line output
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Protection against common-mode noise)
Input signal conditioning
Fo logic
Drive circuit
Protection
circuit
Low-side input (PWM)
FO CFO
(5V line) (Note 1, 2) _{Fault output (5V line)}
(Note 3, 5)
Control supply
Under-Voltage
protection (UV)
(Note 7)
VNC
VD
(15V line)
Note1:
2:
3:
4:
5:
6:
7:
8:
To prevent input signals oscillation, an RC coupling at each input terminal is recommended.
By virtue of integrating HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible.
Fo output is open drain type. The signal line should be pulled up to the positive side of a 5V supply with an approximate 10kΩ resistor.
The wiring between the power DC-link capacitor and the P/N1 terminals should be as short as possible to protect DIP-IPM against catastrophic high
surge voltage. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to mount closely to the
P and N1 terminals.
Fo output pulse width (tFO) should be determined by connecting external capacitor between CFO and VNC terminals. (Example : tFO=2.4ms(typ.)
at CFO=22nF)
High voltage (1200V or more) and fast recovery type (less than 100ns) diodes should be used for the bootstrap circuit.
It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
To prevent LVIC from surge destruction, it is recommended to mount a fast recovery type diode between VNC and NU, NV, NW terminals.
Fig. 3 EXTERNAL PART OF THE DIP-IPM PROTECTION CIRCUIT
DIP-IPM
Drive circuit
P
IC (A)
SC protection
trip level
H-side IGBTS
U
V
W
External protection circuit
L-side IGBTS
N1
Shunt
resistor
A
NU
NV
(Note 1)
NW
R
C
B CIN
Drive circuit
Note1:
2:
C VNC
(Note 2)
Protection circuit
In the recommended external protection circuit, please select the RC time
constant in the range 1.5~2.0µs.
To prevent erroneous protection operation, the wiring of A, B, C should be
as short as possible.
Collector current
waveform
0
2
tw (µs)
Short Circuit Protective Function (SC) :
SC protection is achieved by sensing the L-side DC-Bus current (through the external
shunt resistor) with a suitable filtering time (defined by the RC circuit).
When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
OFF and a fault signal (Fo) is output.
Since the SC fault may be repetitive, it is recommended to stop the system and check the fault,
when the Fo signal is received.
May 2005