M66271FP Datasheet, PDF (19/21 Pages) Mitsubishi Electric Semiconductor – OPERATION PANEL CONTROLLER

(3) Write to VRAM ( RD = "H" )
Term of non cycle steal access
MCS
LWR
(+HWR)
WAIT
D<7:0>
(D<15:0>)
A<13:0>
(+BHE)
tsu(D-MCS)
tsu(D-WR)
tsu(A-MCS)
tsu(A-WR)
MITSUBISHI <DIGITAL ASSP>
M66271FP
OPERATION PANEL CONTROLLER
tw(MCS)
tw(WR)
Data input is established
Address is established
th(MCS-D)
th(WR-D)
th(MCS-A)
th(WR-A)
"H"
(4) Read from VRAM (LWR,HWR = "H" )
Term of non cycle steal access
MCS
RD
WAIT
ta(MCS-D)
tdis(MCS-D)
"H"
D<7:0>
(D<15:0>)
tsu(A-MCS)
tsu(A-RD)
ta(RD-D)
tdis(RD-D)
Data output is established
th(MCS-A)
th(RD-A)
A<13:0>
Address is established
Note 2: Writing/Reading operation for VRAM during non cycle steal access is performed during overlapping MCS and
[LWR(+HWR) or RD].
Limits of MCS,LWR(+HWR) and RD are prescribed by the input signal of last change to "L" in starting access,
and by the input signal of first change to "H" in ending access.