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PDSP16116 Datasheet, PDF (6/17 Pages) Mitel Networks Corporation – 16 X 16 Bit Complex Multiplier | |||
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PDSP16116
NORMAL MODE OPERATION
When the MBFP mode select input is held low the âNormalâ
mode of operation is selected. This mode supports all complex
multiply operations that do not require block floating point
arithmetic.
Complex twoâs complement fractional data is loaded into the
X and Y input registers via the X and Y Ports on the rising edge
of CLK. The X and Y port registers are individually enabled by
the CEX and CEY signals respectively. If the registers are re-
quired to be permanently enabled, then these signals may be
tied to ground.
The Real and Imaginary components of the fractional data
are each assumed to have the following format:
Bit Number
Weighting
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
S 2â1 2â2 2â3 2â4 2â5 2â6 2â7 2â8 2â9 2â10 2â11 2â12 2â13 2â14 2â15
Where S = sign bit, which has an effective weighting of 220
The value of the 16-bit twoâs complement word is (213S)1(bit143221)1(bit133222)1(bit123223) â¦
Multiplier Stage
On each clock cycle the contents of the input registers are passed
to the four multipliers to start a new complex multiply operation.
Each complex multiply operation requires four partial products
(XR3YR), (XR3YI), (XI3YR), (XI3YI), all of which are calculated
in parallel by the four 16316 multipliers. Only one clock cycle is
required to complete the multiply stage before the multiplier results
are loaded into the multiplier output registers for passing on to the
adder/ subtractors in the next cycle. Each multiplier produces a 31-
bit result with the duplicate sign bit eliminated. The format of the
output data from the multipliers is:
Bit Number 30 29 28 27 26 25 24
Weighting
S 2â1 2â2 2â3 2â4 2â5 2â6
The effective weighting of the sign bit is 220
76543210
2â23 2â24 2â25 2â26 2â27 2â28 2â29 2â30
Adder/Subtractor Stage
The 31-bit real and imaginary results from the multipliers
are passed to two 32-bit adder/subtractors. The adder calcu-
lates the imaginary result [(XR 3 YI) 1 (XI 3 YR)] and the
subtractor calculates the real result (XR 3 YR) = (XI 3 YI).
Each adder/subtractor produces a 32-bit result with the
following format:
Bit Number 31 30 29 28 27 26
Weighting
S 20 2â1 2â2 2â3 2â4
The effective weighting of the sign bit is 221
Rounding
The ROUND control when asserted rounds the most
significant 16 bits of the full 32-bit result from the shifter. If the
ROUND signal is active (high), then bit 16 is set to â1â, rounding
the most significant 16 bits of the shifted result. (The least
876543210
2â22 2â23 2â24 2â25 2â26 2â27 2â28 2â29 2â30
significant 16 bits are unaffected). Inserting a â1â ensures that
the rounding error is never greater than 1 LSB and that no DC
bias is introduced as a result of the rounding processes. The
format of the rounded result is:
Bit Number
Weighting
31 30 29 28 27
S 20 2â1 2â2 2â3
18 17 16 15 14 13
2â12 2â13 2â14 2â15 2â16 2â17
210
2â28 2â29 2â30
ROUNDED VALUE
The effective weighting of the sign bit is 221
Result Correction
Due to the nature of the fraction twoâs complement repre-
sentation it is possible to represent 21 exactly but not 11. With
conventional multipliers this causes a problem when 21 is mul-
tiplied by 21 as the multiplier produces an incorrect result. The
PDSP16116 includes a trap to ensure that the most positive
number (value = 1·2230, hex = 7FFFFFFFF) is substituted for
the incorrect result. The multiplier result is therefore always a
correct fractional value. Fig.2 shows the value â1â being multi-
plexed into the data path controlled by four comparators.
LSBs
Complex Conjugation
Either the X or Y input data may be complex conjugated by
asserting the CONX or CONY signals respectively. Asserting
either of these signals has the effect of inverting (multiplying
by 21 ) the imaginary component of the respective input. Table 3
shows the effect of CONX and CONY on the X and Y inputs.
CONX
Low
High
Low
High
CONY Function
Operation
Low
Low
High
High
X3Y
Conj. X 3 Y
X 3 Conj. Y
Invalid
(XR 1 XI)3(YR 1 YI)
(XR 2 XI)3(YR 1 YI)
(XR 1 XI)3(YR 2 YI)
Invalid
Table 3 Conjugate functions
6
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