VP310 Datasheet, PDF (3/31 Pages) Mitel Networks Corporation – Satellite Channel Decoder

VP310
PRELIMINARY DATA
Additional Features
• I²C bus microprocessor interface.
• All digital clock and carrier recovery.
• On-chip PLL clock generation using low cost 10 to 15MHz crystal.
• 3.3V operation.
• 80 pin MQFP package.
• Low external component count.
• Commercial temperature range 0 to 70°C.
Demodulator
• BPSK or QPSK programmable.
• Optional fast acquisition mode for low symbol rates.
Viterbi
• Programmable decoder rates 1/2, 2/3, 3/4, 5/6, 6/7, 7/8.
• Constraint length k=7.
• Trace back depth 128.
• Extensive SNR and BER monitors.
De-Interleaver
• Compliant with DVB and DSS standards.
Reed Solomon
• (204, 188) for DVB and (146,130) for DSS.
• Reed Solomon Bit-error-rate monitor to indicate Viterbi performance.
De-Scrambler
• EBU specification De-scrambler for DVB mode.
Outputs
• MPEG transport parallel & serial output.
• Integrated MPEG2 TEI bit processing for DVB only.
Application Support
• Channel decoder system evaluation board.
• I²C interface board to PC.
• Windows based evaluation software.
• ANSI C generic software.
• Application support help desk via email/telephone.
3