VP310 Datasheet, PDF (21/31 Pages) Mitel Networks Corporation – Satellite Channel Decoder

VP310
PRELIMINARY DATA
When the VP310 QPSK section has locked to the signal, this is indicated in register (6) by
QPSK_STAT H[B0] = 1. The symbol rate found can be read from registers (123 – 124)
MONITOR, provided the register (103) MON_CTRL = 3. The tolerance of the result is ±0.25%.
The 14 MSBs of this result (discarding two LSBs) may be written as the 14 LSBs of the 16-bit
register pair (23 and 24) SYM_RATE in the non-search mode for re-acquisition of the same
channel.
The FEC is locked to the signal, when the Byte Align lock in FEC_STATUS[B2] = 1. Then the
code rate found can be read from FEC_STATUS[B6-4], see register 6 for details.
Program MONITOR to read Symbol rate
MON_CTRL Reg 103 = 3
Read Symbol rate from MONITOR registers 123 & 124.
Symbol rate = MONITOR_H/4 + MONITOR_L/1024 MBaud
eg if MONITOR_H = 27 and MONITOR_L = 136
then Symbol rate = 27.53125 MBaud
ie 27.5 MBaud ±0.25%
Read code rate from FEC_STATUS[B6-4] register 6.
eg if FEC_STATUS = 2C hex
signal is locked and the code rate = 3/4
Figure 17. Results of Symbol rate and code rate search, DVB or DSS mode.
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