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MT93L16 Datasheet, PDF (21/27 Pages) Mitel Networks Corporation – CMOS Low-Voltage Acoustic Echo Canceller
Preliminary Information
MT93L16
Address:
3Ah Read
Power Up
Reset 00h
ROPD0
ROPD1
ROPD2
ROPD3
ROPD4
ROPD5
ROPD6
ROPD7
Receive (Rout) Peak Detect Register 1 (ROPD1)
7
MSB
ROPD7
6 ROPD6
5 ROPD5
4 ROPD4 3 ROPD3 2 ROPD2 1 ROPD1
0 ROPD0
LSB
These peak detector registers allow the user to monitor the receive out signal (Rout) peak level at reference point R3 (see
Figure #1). The information is in 16-bit 2’s complement linear coded format presented in two 8 bit registers. The high byte
is in Register 2 and the low byte is in Register 1.
Address:
3Bh Read
Power Up
Reset 00h
ROPD8
ROPD9
ROPD10
ROPD11
ROPD12
ROPD13
ROPD14
ROPD15
Receive (Rout) Peak Detect Register 2 (ROPD2)
7
MSB
ROPD15
6 ROPD14
5 ROPD13
4 ROPD12 3 ROPD11 2 ROPD10
1 ROPD9
See Above description
0 ROPD8 LSB
Address:
36h Read
Power Up
Reset 00h
SIPD0
SIPD1
SIPD2
SIPD3
SIPD4
SIPD5
SIPD6
SIPD7
Send (Sin) Peak Detect Register 1 (SIPD1)
7
MSB
SIPD7
6 SIPD6
5 SIPD5
4 SIPD4 3
SIPD3 2 SIPD2
1 SIPD1
0 SIPD0 LSB
These peak detector registers allow the user to monitor the receive in signal (Sin) peak level at reference point S1 (see
Figure #1). The information is in 16-bit 2’s complement linear coded format presented in two 8 bit registers. The high byte
is in Register 2 and the low byte is in Register 1.
Address:
37h Read
Power Up
Reset 00h
SIPD8
SIPD9
SIPD10
SIPD11
SIPD12
SIPD13
SIPD14
SIPD15
Send (Sin) Peak Detect Register 2 (SIPD2)
7
MSB
SIPD15
6 SIPD14 5
SIPD13 4
SIPD12 3
SIPD11 2 SIPD10 1 SIPD9
See above description
0 SIPD8 LSB
21