PDSP1601MC Datasheet, PDF (2/18 Pages) Mitel Networks Corporation – ALU and Barrel Shifter

PDSP1601 MC
PIN DESCRIPTIONS
Symbol
Pin No.
(GG100
Package)
Description
MSB
16
ALU B-input multiplexer select control.¹ This input is latched internally on the rising edge
of CLK.
MSS
17
Shifter Input multiplexer select control.¹ This input is latched internally on the rising edge
of CLK.
B15 - B0
18 - 25
30 - 37
B Port data Input. Data presented to this port is latched into the input register on the rising
edge of CLK. B15 is the MSB.
CEB
CLK
38
Clock enable, B Port input register. When low the clock to this register is enabled.
39
Common clock to all internal registered elements. All registers are loaded, and outputs
change on the rising edge of CLK.
MSA0 - MSA1 41 - 42
ALU A-input multiplexer select control.¹ This input are latched internally on the rising edge
of CLK.
A15 - A0
43 - 50
55 - 62
A Port data Input. Data presented to this port is latched into the input register on the rising
edge of CLK. B15 is the MSB.
CEA
MSC
63
Clock enable, A Port input register. When low the clock to this register is enabled.
64
C-Port multiplexer select control.1 This input is latched internally on the rising edge
of CLK.
IS0 - IS3
65 - 68
Instruction inputs to Barrel Shifter, IS3 = MSB.¹ This input is latched internally on the
rising edge of CLK.
SV0 - SV3 69 - 72
Shift Value I/O Port. This port is used as an input when shift values are supplied form
external sources, and as an output when Normalise operations are invoked. The I/O functions
are determined by the IS0 - IS3 instruction inputs, and by the SVOE control.
The shift value is latched internally on the rising edge of CLK.
SVOE
73
SV Output enable. When high the SV port can only operate as an input. When low the SV
port can act as an input or as an output, according to the IS0 - IS3 instruction. This pin should
be tied high or low, depending upon the application.
RS0, RS1
RS2
74 - 75
81
Instruction inputs to Barrel Shifter registers.¹ These input are latched internally on the
rising edge of CLK.
C0 - C15
82 - 98
C Port data output. Data output on this port is selected by the C output multiplexer.
C15 is the MSB
OE
99
Output enable. The C Port outputs are in high impedance condition when this control is high
BFP
100
Block Floating Point Flag from ALU, active high.
CO
6
Carry out from MSB of ALU
RA0 - RA2 7 - 9
Instruction inputs to ALU registsers.¹ These inputs are latched interally on the rising
edge of CLK.
CI
10
Carry in to LSB of ALU
IA0 - IA3
IA4
11 - 14
Instruction inputs to ALU.¹ IA4 = MSB. These inputs are latched internally on the rising
edge of CLK.
Vcc
80, 5
+5V supply: Both Vcc pins must be connected.
GND
90 & 40 ^{0V supply: Both GND pins must be connected.}
NOTES
1. All instructions are executed in the cycle commencing with the rising edge of the CLK which latches the inputs.
2