PDSP1601MC Datasheet, PDF (14/18 Pages) Mitel Networks Corporation – ALU and Barrel Shifter

PDSP1601 MC
ELECTRICAL CHARACTERISTICS
Operating Conditions (unless otherwise stated)
T
AMB
(Military)
=
-55°C
to
+125°C,
V
CC
=
5.0V±10%,
Ground
=
0V
Static Characteristics
Characteristic
* Output high voltage
* Output low voltage
* Input high voltage
* Input low voltage
* Input leakage current
* Vcc current
* Output leakage current
† Output S/C current
† Input capacitance
Symbol
Value
Min. Typ. Max.
V
OH
2.4
V_OL
0.4
V
IH
2.5
V_IL
0.8
V
IH
Vdd -1
V_IL
0.5
I_IL
-10
+10
I_CC
60
I_OZ
-50
+50
I_SC
12
80
C_IN
5
Units
V
V
V
V
V
V
µA
mA
µA
mA
pF
Sub
group
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Conditions
I = 8mA
OH
I_OL = -8mA
CLOCK, OE
CLOCK, OE
GND < V_IN < V_CC
T_amb = -40°C to +85°C
GND < V_OUT < V_CC
V_CC = Max
Switching Characteristics
Characteristics
Value
PDSP1601 _Units
Min. Max.
Sub
group
Conditions
† CLK rising edge to C-PORT
† CLK rising edge to CO
† CLK rising edge to BFP
† Setup CEA or CEB to CLK rising edge
5
40 _ns
5
100 _ns
5
100 _ns
30
ns
2 x LSTTL + 20pF
1 x LSTTL + 5pF
1 x LSTTL + 5pF
† Hold CEA or CEB to CLK rising edge
† Setup A or B port inputs to CLK rising edge
0
ns
40
ns
† Hold A or B port inputs to CLK rising edge
† Setup MSA0-1, MSB, MSS, MSC, RA2-0, RS0-2, IA0-4,
40
0
ns
ns
IS0-3, to CLK rising edge
† Hold RS0-2, IA0-4 to CLK rising edge
0
ns
† Hold IS0-3 to CLK rising edge
3
ns
† Hold MSA0-1, MSB, MSS, MSC, RA0-2 to CLK rising edge
0
ns
† Setup SV to CLK rising edge
40
ns
Input mode
† Hold SV to CLK rising edge
3
ns
Input mode
† CLK rising edge to SV
5
100 _ns
20pF load, SV O P mode
† OE C-PORT Z
40 _ns
2 x LSTTL + 20pF
† OE C-PORT Z
40 _ns
2 x LSTTL + 20pF
† OE C-PORT Z
40 _ns
2 x LSTTL + 20pF
† OE C-PORT Z
40 _ns
2 x LSTTL + 20pF
† Clock period (ALU & Barrel Shifter, serial mode)
200
ns
* Clock period (ALU & Barrel Shifter, parallel mode)
100
ns 9, 10, 11
† Clock high time
40
ns
† Clock low time
40
sn
All parameter marked * are tested during production.
Parameters marked † are guaranteed by design and characterisation
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