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AS4SD32M16 Datasheet, PDF (17/52 Pages) Austin Semiconductor – 512Mb: 32 Meg x 16 SDRAM Synchronous DRAM Memory
SDRAM
AS4SD32M16
Data for any WRITE burst may be truncated with a sub-
sequent READ command, and data for a fixed-length WRITE
burst may be immediately followed by a READ command.
Once the READ command is registered, the data inputs will
be ignored, and WRITEs will not be executed. An example
is shown in Figure 17. Data n+1 is either the last of a burst of
two or the last desired of a longer burst.
Data for a fixed-length WRITE burst may be followed by,
or truncated with, a PRECHARGE command to the same bank
(provided that auto precharge was not activated), and a full-page
WRITE burst may be truncated with a PRECHARGE command
to the same bank. The PRECHARGE command should be
issued tWR after the clock edge at which the last desired input
data element is registered. The auto precharge mode requires
a tWR of at least one clock plus time, regardless of frequency.
In addition, when truncating a WRITE burst, the DQM signal
must be used to mask input data for the clock edge prior to, and
the clock edge coincident with, the PRECHARGE command.
An example is shown in Figure 18. Data n+1 is either the last
of a burst of two or the last desired of a longer burst. Following
the PRECHARGE command, a subsequent command to the
same bank cannot be issued until tRP is met. The precharge
can be issued coincident with the first coincident clock edge
(T2 in Figure 18) on an A1 Version and with the second clock
on an A2 Version (Figure 18).
In the case of a fixed-length burst being executed to com-
pletion, a PRECHARGE command issued at the optimum time
(as described above) provides the same operation that would
result from the same fixed-length burst with auto precharge.
The disadvantage of the PRECHARGE command is that is
requires that the command and address buses be available
at the appropriate time to issue the command; the advantage of
the PRECHARGE command is that it can be used to truncate
fixed-length or full-page bursts.
FIGURE 16: Random WRITE Cycles
FIGURE 18: WRITE to PRECHARGE
FIGURE 17: WRITE to READ
AS4SD32M16
Rev. 2.0 10/13
17
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