MT9M111 Datasheet, PDF (9/61 Pages) Micron Technology – 1/3-INCH SOC MEGAPIXEL CMOS DIGITAL IMAGE SENSOR

PRELIMINARY
MT9M111
SOC MEGAPIXEL DIGITAL IMAGE SENSOR
Typical Connections
Figure 3 shows typical MT9M111 device connec-
tions. For low-noise operation, the MT9M111 requires
separate power supplies for analog and digital. Incom-
ing digital and analog ground conductors can be tied
together next to the die. Both power supply rails
should be decoupled to ground using ceramic capaci-
tors. The use of inductance filters is not recom-
mended.
The MT9M111 also supports different digital core
(VDD/DGND) and I/O power (VDDQ/DGNDQ) power
domains that can be at different voltages.
Figure 3: Typical Configuration (Connection)
1.7V–3.6V
2.8V
I/O Digital Core Digital 2.8V Analog
VDD
Two-Wire
Serial Interface
SADDR
SCLK
SDATA
Master Clock
Power-on Reset
CLKIN
RESET#
OE#
STANDBY
Digital GND
0.1µF
1µF
DOUT[7:0]
FRAME_VALID
LINE_VALID
PIXCLK
STROBE
To CMOS
Camera Port
1.5KΩ
SCLK
To Xenon or LED
Flash Driver
SDATA
1.5KΩ
VDDQ
1KΩ
RESET#
0.1µF
1µF
+
10µF
Analog GND
DGNDQ
DGND
VAA/VAAPIX
0.1µF
1µF
AGND
NOTE:
1. 1.5KΩ resistor value recommended, but may be greater for slower two-wire speed.
2. VDD, VAA, VAAPIX must all be at the same potential, though if connected, care must be taken to avoid excessive noise
injection in the VAA/VAAPIX power domains.
09005aef8136743e pdf/09005aef8136761e zip
MT9M111__SOC1310__2.fm - Rev. C 10/04 EN
9
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