MT48LC4M32B2P-7 Datasheet, PDF (80/80 Pages) Micron Technology – SDR SDRAM MT48LC4M32B2 – 1 Meg x 32 x 4 Banks

128Mb: x32 SDRAM
Clock Suspend
Figure 52: Clock Suspend Mode
T0
T1
T2
T3
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCKS tCKH
tCMS tCMH
Command
READ
NOP
NOP
DQM
Address
tAS tAH
Column m
tCMS tCMH
A10
BA0, BA1
tAS tAH
tAS tAH
Bank
tAC
DQ
tLZ
T4
NOP
D_OUT
tAC
tOH
T5
NOP
tHZ
D_OUT
T6
T7
T8
NOP
WRITE
Column e
Bank
tDS tDH
D_IN
Don’t Care
Note: 1. For this example, BL = 2, CL = 3, and auto precharge is disabled.
T9
NOP
D_IN
Undefined
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This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.
Although considered final, these specifications are subject to change, as further product development and data characterization some-
times occur.
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. P 9/11 EN
80
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