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M25P16-VMN6PBA Datasheet, PDF (40/53 Pages) Micron Technology – Micron M25P16 Serial Flash Embedded Memory
Micron M25P16 Serial Flash Embedded Memory
AC Characteristics
2. When using the PAGE PROGRAM command to program consecutive bytes, optimized
timings are obtained in one sequence that includes all the bytes rather than in several
sequences of only a few bytes (1 < n < 256).
3. int(A) corresponds to the upper integer part of A. For example, int(12/8) = 2 and
int(32/8) = 4.
Table 18: AC Specifications (75 MHz, Device Grade 3 and 6, VCC[min]=2.7V)
Symbol
fC
fR
tCH
tCL
tCLCH
tCHCL
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tSHQZ
tCLQV
tCLQX
tHLCH
tCHHH
tHHCH
tCHHL
tHHQX
tHLQZ
tWHSL
tSHWL
tDP
tRES1
tRES2
Alt. Parameter
Min Typ Max Unit Notes
fC Clock frequency for all commands (except READ)
– Clock frequency for READ command
D.C.
–
D.C.
–
75 MHz
33 MHz
tCLH Clock HIGH time
tCLL Clock LOW time
– Clock rise time (peak to peak)
6
–
6
–
0.1
–
–
ns
2
–
ns
2
–
V/ns 3, 4
– Clock fall time (peak to peak)
0.1
–
–
V/ns 3, 4
tCSS S# active setup time (relative to C)
S# not active hold time (relative to C)
5
–
–
ns
5
–
–
ns
tDSU Data In setup time
tDH Data In hold time
– S# active hold time (relative to C)
2
–
–
ns
5
–
–
ns
5
–
–
ns
– S# not active setup time (relative to C)
5
–
–
ns
tCSH S# deselect time
tDIS Output disable time
tV Clock LOW to output valid under 30 pF
Clock LOW to output valid under 10 pF
100
–
–
–
–
–
–
–
–
ns
8
ns
3
8
ns
6
ns
tHO Output hold time
– HOLD# setup time (relative to C)
0
–
–
ns
5
–
–
ns
– HOLD# hold time (relative to C)
5
–
–
ns
– HOLD# setup time (relative to C)
5
–
–
ns
– HOLD# hold time (relative to C)
5
–
–
ns
tLZ HOLD# to output LOW-Z
tHZ HOLD# to output HIGH-Z
– WRITE PROTECT setup time
–
–
–
–
20
–
8
ns
3
8
ns
3
–
ns
5
– WRITE PROTECT hold time
100
–
–
ns
5
– S# HIGH to DEEP POWER-DOWN mode
–
–
3
μs
3
– S# HIGH to STANDBY without READ ELECTRONIC SIGNA-
–
TURE
–
30
μs
3
– S# HIGH to STANDBY with READ ELECTRONIC SIGNATURE –
–
30
μs
3
Notes:
1. Applies to entire table: 110nm technology devices are identified by the process identifi-
cation digit 4 in the device marking and the process letter B in the part number.
2. The tCH and tCL signal values must be greater than or equal to 1/fC.
3. The tCLCH, tCHCL, tSHQZ, tHHQX, tHLQZ, tDP, and tRDP signal values are guaranteed by charac-
terization, not 100% tested in production.
4. The tCLCH and tCHCL signals clock rise and fall time values are expressed as a slew-rate.
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