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N25Q128A11E1240X Datasheet, PDF (4/83 Pages) Micron Technology – Micron Serial NOR Flash Memory
128Mb, Multiple I/O Serial Flash Memory
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 7
Figure 2: 8-Pin, VDFPN8 – MLP8 and SOP2 – SO8W (Top View) ......................................................................... 8
Figure 3: 16-Pin, Plastic Small Outline – SO16 (Top View) .................................................................................. 8
Figure 4: 24-Ball TBGA (Balls Down) ................................................................................................................ 9
Figure 5: Block Diagram ................................................................................................................................ 12
Figure 6: Bus Master and Memory Devices on the SPI Bus ............................................................................... 18
Figure 7: SPI Modes ....................................................................................................................................... 18
Figure 8: Internal Configuration Register ........................................................................................................ 20
Figure 9: READ REGISTER Command ............................................................................................................ 30
Figure 10: WRITE REGISTER Command ......................................................................................................... 32
Figure 11: READ LOCK REGISTER Command ................................................................................................. 34
Figure 12: WRITE LOCK REGISTER Command ............................................................................................... 35
Figure 13: READ ID and MULTIPLE I/O Read ID Commands .......................................................................... 37
Figure 14: READ Command ........................................................................................................................... 41
Figure 15: FAST READ Command ................................................................................................................... 41
Figure 16: DUAL OUTPUT FAST READ ........................................................................................................... 42
Figure 17: DUAL INPUT/OUTPUT FAST READ Command .............................................................................. 42
Figure 18: QUAD OUTPUT FAST READ Command ......................................................................................... 43
Figure 19: QUAD INPUT/OUTPUT FAST READ Command ............................................................................. 43
Figure 20: PAGE PROGRAM Command .......................................................................................................... 45
Figure 21: DUAL INPUT FAST PROGRAM Command ...................................................................................... 46
Figure 22: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 46
Figure 23: QUAD INPUT FAST PROGRAM Command ..................................................................................... 47
Figure 24: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 48
Figure 25: WRITE ENABLE and WRITE DISABLE Command Sequence ............................................................ 50
Figure 26: SUBSECTOR and SECTOR ERASE Command .................................................................................. 52
Figure 27: BULK ERASE Command ................................................................................................................ 53
Figure 28: RESET ENABLE and RESET MEMORY Command ........................................................................... 56
Figure 29: READ OTP Command .................................................................................................................... 57
Figure 30: PROGRAM OTP Command ............................................................................................................ 59
Figure 31: XIP Mode Directly After Power-On .................................................................................................. 61
Figure 32: Power-Up Timing .......................................................................................................................... 63
Figure 33: Reset AC Timing During PROGRAM or ERASE Cycle ........................................................................ 66
Figure 34: Reset Enable ................................................................................................................................. 66
Figure 35: Serial Input Timing ........................................................................................................................ 66
Figure 36: Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD = 1) ................... 67
Figure 37: Hold Timing .................................................................................................................................. 68
Figure 38: Output Timing .............................................................................................................................. 68
Figure 39: VPPH Timing .................................................................................................................................. 69
Figure 40: AC Timing Input/Output Reference Levels ...................................................................................... 71
Figure 41: V-PDFN-8 6mm x 5mm Sawn (MLP8) – Package Code: F7 ................................................................ 75
Figure 42: V-PDFN-8 8mm x 6mm (MLP8) – Package Code: F8 ........................................................................ 76
Figure 43: T-PBGA-24b05 6mm x 8mm – Package Code: 12 .............................................................................. 77
Figure 44: SOP2-16 (300 mils body width) – Package Code: SF ......................................................................... 78
Figure 45: SOP2-8 (208 mils body width) – Package Code: SE ........................................................................... 79
PDF: 09005aef845665f6
n25q_128mb_1_8v_65nm.pdf - Rev. K 06/2012 EN
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