MT48LC64M4A2 Datasheet, PDF (38/62 Pages) Micron Technology – SYNCHRONOUS DRAM

AC FUNCTIONAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 11; notes appear on page 37)
PARAMETER
READ/WRITE command to READ/WRITE command
CKE to clock disable or power-down entry mode
CKE to clock enable or power-down exit setup mode
DQM to input data delay
DQM to data mask during WRITEs
DQM to data high-impedance during READs
WRITE command to input data delay
Data-in to ACTIVE command
Data-in to PRECHARGE command
Last data-in to burst STOP command
Last data-in to new READ/WRITE command
Last data-in to PRECHARGE command
LOAD MODE REGISTER command to ACTIVE or REFRESH command
Data-out to high-impedance from PRECHARGE command
256Mb: x4, x8, x16
SDRAM
CL = 3
CL = 2
SYMBOL -7E
t_CCD
1
t_CKED
1
t_PED
1
t_DQD
0
t_DQM
0
t_DQZ
2
t_DWD
0
t_DAL
4
t_DPL
2
t_BDL
1
t_CDL
1
t_RDL
2
t_MRD
2
t_{ROH(3) 3}
t_{ROH(2) 2}
-75 UNITS NOTES
1
t_CK
17
1
t_CK
14
1
t_CK
14
0
t_CK
17
0
t_CK
17
2
t_CK
17
0
t_CK
17
5 ^tCK 15, 21
2 ^tCK 16, 21
1
t_CK
17
1
t_CK
17
2 ^tCK 16, 21
2
t_CK
26
3
t_CK
17
2
t_CK
17
256Mb: x4, x8, x16 SDRAM
256MSDRAM_E.p65 – Rev. E; Pub. 3/02
38
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©2002, Micron Technology, Inc.