MT29F2G16AADWPDTR Datasheet, PDF (38/88 Pages) Micron Technology – 2Gb x8, x16: NAND Flash Memory

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2Gb x8, x16: NAND Flash Memory
Command Definitions
Internal Data Move
An internal data move requires two command sequences. Issue a READ for INTERNAL
DATA MOVE (00h-35h) command first, then the PROGRAM for INTERNAL DATA MOVE
(85h-10h) command.
READ FOR INTERNAL DATA MOVE 00h-35h
The READ for INTERNAL DATA MOVE (00h-35h) command is used in conjunction with
the PROGRAM for INTERNAL DATA MOVE (85h-10h) command. First, 00h is written to
the command register, then the internal source address is written (5 cycles). After the
address is input, the READ for INTERNAL DATA MOVE (35h) command writes to the
command register. This transfers a page from memory into the cache register.
All 5 ADDRESS cycles are required when a READ for INTERNAL DATA MOVE command
is issued.
After a READ for INTERNAL DATA MOVE (00h-35h) command is issued and R/B#
returns HIGH, signifying operation completion, the data transferred from the source
page into the cache register may be read out by toggling RE#. Data is output sequentially
from the column address originally specified with the READ FOR INTERNAL DATA
MOVE (00h-35h) command. RANDOM DATA READ (05h-E0h) commands can be issued
without limit after the READ FOR INTERNAL DATA MOVE command.
The memory device is now ready to accept the PROGRAM for INTERNAL DATA MOVE
command. Please refer to the description of this command in the following section.
PROGRAM for INTERNAL DATA MOVE 85h-10h
After the READ for INTERNAL DATA MOVE (00h-35h) command has been issued and
R/B# goes HIGH, the PROGRAM for INTERNAL DATA MOVE (85h-10h) command can
be written to the command register. This command transfers the data from the cache register
to the data register and programming of the new destination page begins. The sequence:
85h, destination address (5 cycles), then 10h, is written to the device. After 10h is written,
R/B# goes LOW while the control logic automatically programs the new page. The READ
STATUS command can be used instead of the R/B# line to determine when the write is
complete. When status register bit 6 = 1, bit 0 of the status register indicates if the opera-
tion was successful.
The RANDOM DATA INPUT (85h) command can be used during the PROGRAM for
INTERNAL DATA MOVE command sequence to modify one or more bytes of the original
data. First, data is copied into the cache register using the 00h-35h command sequence,
then the RANDOM DATA INPUT (85h) command is written along with the address of the
data to be modified next. New data is input on the external data pins. This copies the
new data into the cache register.
When 10h is written to the command register, the original data plus the modified data
are transferred to the data register, and programming of the new page is started. The
RANDOM DATA INPUT command can be issued as many times as necessary before
starting the programming sequence with 10h (see Figures 28 and 29 on page 39).
Because INTERNAL DATA MOVE operations do not use external memory, ECC cannot
be used to check for errors before programming the data to a new page. This can lead to
a data error if the source page contains a bit error due to charge loss or charge gain. In
the case that multiple INTERNAL DATA MOVE operations are performed, these bit
errors may accumulate without correction. For this reason, it is highly recommended
that systems using INTERNAL DATA MOVE operations also use a robust ECC scheme
that can correct 2 or more bits per sector.
PDF: 09005aef82784784 / Source: 09005aef82784840
NDA_2gb_nand_m59a__2.fm - Rev. A 8/08 EN
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