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MT29F2G16AADWPDTR Datasheet, PDF (12/88 Pages) Micron Technology – 2Gb x8, x16: NAND Flash Memory
Micron Confidential and Proprietary
2Gb x8, x16: NAND Flash Memory
General Description
Table 1: Signal Descriptions
Symbol
ALE
CE#
CLE
LOCK
RE#
WE#
WP#
I/O[7:0]
(x8)
I/O[15:0]
(x16)
R/B#
VCC
VSS
NC
DNU
Type
Input
Input
Input
Input
Input
Input
Input
I/O
Output
Supply
Supply
–
–
Description
Address latch enable: During the time ALE is HIGH, address information is
transferred from I/O[7:0] into the on-chip address register on the rising edge of
WE#. When address information is not being loaded, ALE should be driven LOW.
Chip enable: This gates transfers between the host system and the NAND Flash
device. After the device starts a PROGRAM or ERASE operation, CE# can be de-
asserted. See “Bus Operation” on page 18 for additional operational details.
Command latch enable: When CLE is HIGH, information is transferred from
I/O[7:0] to the on-chip command register on the rising edge of WE#. When
command information is not being loaded, CLE should be driven LOW.
When LOCK is HIGH during power-up, the BLOCK LOCK function is enabled. To
disable the BLOCK LOCK, connect LOCK to VSS during power-up, or leave it
disconnected (internal pull-down).
Read enable: This gates transfers from the NAND Flash device to the host system.
Write enable: This gates transfers from the host system to the NAND Flash device.
Write protect: This protects against inadvertent PROGRAM and ERASE operations.
All PROGRAM and ERASE operations are disabled when WP# is LOW.
Data inputs/outputs: The bidirectional I/Os transfer address, data, and instruction
information. Data is output only during READ operations; at other times the I/Os
are inputs.
Ready/busy: This is an open-drain, active-LOW output that uses an external pull-
up resistor. R/B# is used to indicate when the chip is processing a PROGRAM or
ERASE operation. It is also used during READ operations to indicate when data is
being transferred from the array into the serial data register. When these
operations have completed, R/B# returns to the high-impedance state.
VCC: This is the power supply.
VSS: This is the ground connection.
No connect: NCs are not internally connected. They can be driven or left
unconnected.
Do not use: DNUs must be left unconnected.
PDF: 09005aef82784784 / Source: 09005aef82784840
NDA_2gb_nand_m59a__2.fm - Rev. A 8/08 EN
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