MT9D011 Datasheet, PDF (29/61 Pages) Micron Technology – 1/3-INCH 2-MEGAPIXEL CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR

PRELIMINARY
MT9D011
2-MEGAPIXEL DIGITAL IMAGE SENSOR
Table 7: Register Description (continued)
BIT FIELD
DESCRIPTION
DEFAULT SYNC’D TO BAD
(HEX) FRAME START FRAME
Bits 7:0 Xenon Count Length of FLASH pulse when Xenon flash is enabled. The
8
value specifies the length in units of 1024*PIXCLK cycle
increments. When the Xenon count is set to its maximum
value (0xFF), the FLASH pulse is automatically truncated
prior to the readout of the first row, giving the longest pulse
possible.
N
N
R36—0X24 - EXTRA RESET (R/W)
Bit 15 Extra Reset 0: Only programmed window (set by Reg0x01 through
1
Enable
Reg0x04) and black pixels are read.
1: Two additional rows are read and reset above and below
programmed window to prevent blooming to active area.
Bit 14 Next Row Reset When set, and the integration time is less than one frame
0
time, row (n+1) is reset immediately prior to resetting row
(n). This is intended to prevent blooming across rows under
conditions of very high illumination.
Bits 13:0 Reserved
Do not change from default value.
N
N
N
N
R37—0X25 - LINE_VALID CONTROL (R/W)
Bit 15 Xor
1: LINE_VALID = “continuous” LINE_VALID XOR
0
LINE_VALID FRAME_VALID.
0: Normal LINE_VALID (default, no XORing of LINE_VALID).
Ineffective if continuous LINE_VALID is set.
Bit 14 Continuous 1: “Continuous” LINE_VALID (continue producing
0
LINE_VALID LINE_VALID during vertical blank).
0: Normal LINE_VALID (default, no LINE_VALID during
vertical blank).
N
N
N
N³
R38—0X26 - BOTTOM DARK ROWS (R/W)
Bit 7
Show
The bottom dark rows are visible in the image if the bit is
0
set.
Bits 6:4 Start Address Defines the start address within the eight bottom dark rows.
0
Bit 3
Enable
Enable readout of the bottom dark rows.
0
Readout
Bits 2:0 Number of Defines the number of bottom dark rows to be used. (The
7
Dark Rows
number of rows used is the specified value +1.)
N
N
N
N
N
Y
N
Y
R43—0X2B - GREEN1 GAIN (R/W)
Bits 11:9 Digital Gain Total gain = (bit 9 + 1)*(bit 10 + 1)*(bit 11 + 1)*analog gain
0
(each bit gives 2x gain).
Bits 8:7 Analog Gain Analog gain = (bit 8 + 1)*(bit 7 + 1)*initial gain (each bit
0
gives 2x gain).
Bits 6:0 Initial Gain Initial gain = bits 6:0*0.03125.
20
Y
N
Y
N
Y
N
R44—0X2C - BLUE GAIN (R/W)
Bits 11:9 Digital Gain Total gain = (bit 9 + 1)*(bit 10 + 1)*(bit 11 + 1)*analog gain
0
(each bit gives 2x gain).
Bits 6:0 Initial Gain Initial gain = bits [6:0]*0.03125.
20
Bits 8:7 Analog Gain Analog gain = (bit 8 + 1)*(bit 7 + 1)*initial gain (each bit
0
gives 2x gain).
Y
N
Y
N
Y
N
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MT9D011__MI2010_E_2.fm - Rev. A 11/04 EN
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