MT48LC1M16A1S Datasheet, PDF (28/51 Pages) Micron Technology – SYNCHRONOUS DRAM

16Mb: x16
SDRAM
TRUTH TABLE 4 – CURRENT STATE BANK n - COMMAND TO BANK m
(Notes: 1-6; notes appear below and on next page)
CURRENT STATE CS# RAS# CAS# WE#
Any
HXXX
L HHH
Idle
XXXX
Row Activating, L L H H
Active or
LHLH
Precharging L H L L
L LHL
Read
L L HH
(Auto
LHLH
Precharge
LHL L
Disabled)
L LHL
Write
L L HH
(Auto
LHLH
Precharge
LHL L
Disabled)
L LHL
Read
L L HH
(With Auto L H L H
Precharge)
LHL L
L LHL
Write
L L HH
(With Auto L H L H
Precharge)
LHL L
L LHL
COMMAND (ACTION)
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any command otherwise allowed to bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
NOTES
7
7
7, 10
7, 11
9
7, 12
7, 13
9
7, 8, 14
7, 8, 15
9
7, 8, 16
7, 8, 17
9
NOTE:
1. This table applies when CKE was HIGH and CKE is HIGH (see Truth Table 2) and after ^tXSR has been
n-1
n
met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the
commands shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given
command is allowable). Exceptions are covered in the notes below.
3. Current state definitions:
Idle: The bank has been precharged and ^tRP has been met.
Row Active: A row in the bank has been activated and ^tRCD has been met. No data bursts/accesses and no
register accesses are in progress.
Read: A READ burst has been initiated, with AUTO PRECHARGE disabled, and has not yet terminated
or been terminated.
Write: A WRITE burst has been initiated, with AUTO PRECHARGE disabled, and has not yet terminated
or been terminated.
Read w/Auto
Precharge Enabled: Starts with registration of a READ command with AUTO PRECHARGE enabled and ends when ^tRP
has been met. Once ^tRP is met, the bank will be in the idle state.
Write w/Auto
Precharge Enabled: Starts with registration of a WRITE command with AUTO PRECHARGE enabled and ends when
t_{RP has been met. Once} t_{RP is met, the bank will be in the idle state.}
16Mb: x16 SDRAM
16MSDRAMx16.p65 – Rev. 8/99
28
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©1999, Micron Technology, Inc.